A new design partitioning system for PCBs (Printed Circuit Boards) and MCMs (MultiChip Modules) allows a hierarchical approach to complex designs, enabling subcircuit reuse and concurrent layout.
PCBs are rapidly increasing in complexity to the point where the design of large boards is almost impossible for a single engineer. Also, many boards have mixed analog/digital and radio frequency (RF) circuitry and the individual design and simulation software is often incompatible. These factors can make board design very time consuming so in the CONSOLE project, the VISULA Design Partitioning system software has been developed and validated to increase systems design and layout productivity and reduce the number of design cycles. It allows designers to break down complex boards into smaller, easier to manage blocks by partitioning a system into components such as the backplane, daughter boards and MCMs (MultiChip Modules). These can be designed in parallel and consistently managed and verified throughout the design process, before merging into the final board layout. It also allows previously validated subcircuits (Known Good Modules, KGMs) to be reused.
Business perspective
This software delivers for PCB/MCM layouts the same benefits as those long appreciated in circuit design and VLSI layout. Performing full hierarchical design partitioning allows more than one designer to work on the same board concurrently,
considerably reducing total circuit design time and minimising costs by reducing iterations. Moreover, by allowing the reuse of already tested subcircuits, design time, costs and time-to-market for complete products as well as product updates can be dramatically cut.
Hierarchical physical design partitioning allows the design to be worked on in parallel, while ensuring that any conflicts between the separate designs are reduced to a minimum when combined on the final layout. "VISULA" ensures that subcircuits are created with compatible technology and design rules, and that the circuit description maintains an exact match with the original logical design. It also allows partitions to be examined and checked in the master design during the layout process, and DRC and post-processing can be performed at any stage, before or after the final design has been assembled. This approach ensures design integrity is maintained at all times and connectivity between the partitions and subcircuits can be controlled by creating 'route outs', with common connections intelligently named and displayed. Applications In many sectors of the electronics market, time to market is more crucial than cost. ICL recently used VISULA to design a large, complex board in just four months and it also saved at least one iteration, saving about 25% of the expected design costs.
tel: +44-1685- 294-161 -- fax +44-1684-299-754
e-mail 1 chage@redac.co.uk
e-mail 2: mthompson@redac.co.uk
| Project Participants | |||
|---|---|---|---|
| ICL UK | |||
| Matra Defense FR | |||
| Matra Marconi Space FR | |||
| Rhode & Schwarz GmbH & Co KG GE | |||
| Zuken-Redac UK | |||
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