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Image Thermal Modelling of Electronic Components

The development and experimental validation of 'generic' thermal models for a variety of packages and electronic components is leading to more accurate prediction of thermal behaviour and more reliable equipment designs.


Designing out failures resulting from component overheating early in the design cycle significantly reduces design and prototyping times, and increases reliability, but needs accurate, validated thermal models of critical parts. This had been severely hindered by a lack of reliable, standardised input data, a problem addressed by the DELPHI project. Methodologies were developed for generating 'detailed' 3-D conduction models, from which 'compact' (behavioural) models are derived, valid for the thermal environments experienced by the part. Novel experimental procedures are used to validate the detailed models. Using these methodologies, validated models have been created for many types of 'generic' electronic components.

Business perspective

Component thermal management is crucial, as ever more transistors are incorporated onto single pieces of silicon. This increases the electronic equipment manufacturers' need for reliable thermal models of packages and other parts, to design in adequate cooling and ensure thermal reliability. With the accurate modelling techniques developed, design times can be drastically reduced while giving greater confidence in equipment reliability. DELPHI has thus provided component manufacturers with the means to create validated, compact thermal models to pass on to customers and thanks to DELPHI, Europe has taken the lead in thermal characterisation of electronic parts.

Technical perspective

Models have been generated for plastic and ceramic mono-chip packages, multi-chip modules (MCMs), passive components, air flow parts, heat transfer enhancers and interfacing materials. A 'detailed' finite-volume or finite-element thermal model of a Image component is first created and, after validation using two novel experimental procedures, a 'compact' thermal resistor network is generated by mathematical reduction techniques. The first procedure, known as the Double Cold Plate (DCP) method, measures the junction temperature of a chip package by clamping the part between two temperature-controlled cold plates, with the thermal contact resistances accurately determined by a transient Interfacial Thermal Resistance (ITR) technique. The second, Submerged Double Jet Impingement (SDJI), measures the junction temperature of a chip package by immersing the part in a fluid and subjecting it, on both sides, to two fluid jet streams.


Current thermal junction metrics are specific to the idealised environments in which they are measured and are thus only valid for chip package comparisons, a fact recognised by JEDEC. After full evaluation of the models developed under DELPHI, the aim is to secure widespread adoption of the technology.

Contact Point

John Parry
Flomerics Group plc
81 Bridge Road
Hampton Court

e-mail : (email removed)


Research Area Technologies for Components for Subsystems

Project DELPHI

Related Results SEED

Keywords electronic components; multichip modules;packaging, ceramic; single-chip modules; thermal modelling;

Project Participants
Alcatel Bell BE
Alcatel Espace FR
Flomerics Ltd UK
National Microelectronics Research Centre IR
Philips CFT NL
Thomson-CSF FR

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This page was last updated on 22 November 1996, and is maintained by (email removed)