CORDIS Archive
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September 1995
2.1 System Characteristics
2.2 Design / Test & tools
2.3 Cells & Macrocells
2.4 Semiconductor technology
2.5 Packaging & Interconnect
Mr. Van Wauwe Alcatel Bell Mr. Duriez Dassault Electronique Mr. Johansson Ericsson Radio Systems Mr. Laurent IBM Mr. Heaton ICL Mr. Ashcroft ICL Mr. Hauser Landis & Gyr Mr. Roughton Lucas Electronics Mr. Schneider microLEX Systems Mr. Neuvo Nokia Mobile Phones Mr. Van Ginderdeuren Philips International Technology Centre Mr. Gschwendtner Robert Bosch Mr. Berger Robert Bosch Mr. Suski Schlumberger Gas Mr. Macel Schlumberger Industries Mr. Certiat Schneider Mr. Hacke Siemens Mr. Chas Telefonica I&D Mr. Perdrieau Thomson Multimedia Mr. Pery Thomson Multimedia Mr. Forster Mr. Newman Mr. Broster Mr. Magan (Rapporteur)
The goal of this Systems Developers Workshop was to consult with users of the technologies addressed in the Workprogramme and to establish a list of their needs and priorities. Other workshops have been arranged to cover the areas of display and storage technologies, semiconductor production equipment, and flexible manufacturing. The results will be an input to the Workprogramme for 1996-1998.
The workshop was held in Brussels on September 13, 1995. Participants were invited from companies which are semiconductor consumers in their systems or products. The attendees were asked to avoid setting out their requirements in a European context, with reference to suppliers with headquarters in Europe, but rather a global view was encouraged. The scene-setting question posed was: "Are you able to get from your suppliers the technologies and tools which you require to develop optimally your systems?"
All the companies project steep reduction in their power budgets. This reduction will not be achieved only through technology shrink and moving to lower voltages, but also through low power design. Extremely low power chips will enable extended battery lifetimes of the order of years.
A key issue which makes the difference between success and failure in the market is cost. In mobile telephony, for example, the costs of digital and analogue transceivers are projected to be cut by 75% and 60% respectively over the next four years. Power consumption (both idle and talk time) for mobile telephony is projected to be reduced over the same period by approximately 50%. Integration with RF, novel processor and systems architectures, and improved packaging and interconnect are the means by which these goals of improved performance with lower power are to be achieved.
Design integration must cover the whole flow from systems design through to the circuit layout. Each problem must be optimised at the right level, and the total view must be considered when trade-offs are made. It is necessary to have all the systems components available at the correct level - a transceiver, for example, may contain radio, DSP, digital ASIC, analogue ASIC, and microprocessor elements. These individual competencies must all be well developed and modeled for the system simulation to be successful in analysing trade-offs between designs for the optimum cost. In systems design, CAE and its development has to become an integral part of the product strategy.
The gap between hardware and software design should be bridged. Design methodologies and tools for complete single-chip integration of embedded hardware/software are needed. Low power solutions are an issue - the tools must take power budgets into account. In a telecom ASIC, for example, 75% of the budget is consumed in the RAM alone.
There is an increase in optical systems for telecoms, but all-optical switching will only be realised in the very long-term. Increasing use of multimedia (MM) will need low-cost ISDN MM terminals in the short- to medium-term, and ATM MM terminals in the medium term. Videoservers demand high performance storage and high throughput at a low cost, which is currently not feasible.
Three strategic aims presented from a computer supplier's point of view are: reduced product costs; improved time to market; and reduced development costs. These aims are being tackled through the use of commodity components; through commonality of components, peripherals, and reusing designs; and through using a modular approach which facilitates technology evolution in their products.
Design tools should, as far as possible, incorporate production costs. The lack of analogue and mixed-signal tools is a bottleneck in systems design. Even when good CAD tools are available locally, they tend to be passed over for ones from the established market leaders, though these may be inferior. No major CAD vendor supplies systems design needs.
Mixed-signal applications are important for Europe, dominating in many sectors where Europe is strong (automotive, consumer electronics, telecoms, mobile telephony......) and it is important to maintain this lead and ensure supply. There is a feeling that the main CAD vendors are not really interested in some user requirements for mixed-signal, seeing it as too long-term, and with too small a market, and in any event they prefer to concentrate on the digital sector. Prototype tools exist, but are not well developed or supported. The interface between design and test is critical - the design must be made with the test requirements considered. One way to proceed in mixed-signal design is to continue to foster cooperation between the major users and European-based mixed signal tool developers, and to build long-term strategic cooperation. It is necessary to develop human resources through user experience and training in systems design. The ESD action was applauded in encouraging users in this field, but the requirement of having a software vendor incorporated may need reconsideration.
Access to embedded microprocessors and DSP cores are important. Separate, dedicated libraries are needed for low power and high speed applications. Since the larger companies have the ability to license important cells, this is not an issue for them, but for smaller companies it is a problem. IPR may be a problem when working on this level. Access to, and licensing of, the more commonly used "core" macrocells should be facilitated, so as to encourage the replacement of specific hardware by non-dedicated DSP.
The cheapest technological solution which fits the product specification is the one that will be used, even though it may not be the state of the art. Monolithic solutions should not be pursued as an end in themselves, but rather they will only be used where cost reduction will result. An example is the one-chip radio, which is at present not the most cost-effective solution. However, low-cost chips with integrated bus interfaces (CAN, LON, EHSA, EIB) are needed, as are ASICs capable of integrating 24VDC.
Avionic systems have a challenging technology roadmap. Data processing performance is projected to go from 5 GOPS in 1995 to 20 GOPS in 2000 and on to 100 GOPS by 2005. Although this is a twenty-fold increase in performance, power is projected to increase only by a factor of five over the same decade, with no change in silicon area.
The users are satisfied both with the semiconductor technology currently available from the manufacturers, and also with their projected technology roadmaps. It is important to maintain "mainstream technology" expertise to keep pace with their requirements and also with developments in the rest of the world.
While an underlying trend in packaging is towards higher integration, with increased I/O numbers and smaller pitches, the way this is expressed depends on the specific application and so the packaging/interconnect solution used will be cost-driven and may be anything from conventional PCB to multichip modules (MCM), and employ either encapsulated components or bare die. Advanced fine-line multilayer PCBs with integrated passive components are increasingly used, and their development is such that it is now difficult to distinguish between these and laminated MCMs (MCM-L).
In the automotive and aerospace sector, the rising electronic functionality requires higher system integration to reach the required reliability in this harsh environment. A particular problem for components such as EEPROM and capacitors is high temperature operation. Systems design must incorporate interconnect and manufacturing cost considerations. The availability of Known Good Die is still an issue to be satisfactorily resolved. Other required developments are thin layer batteries, connectors which avoid mis-wiring, and smart tags.
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It was last updated on 31 October 1996, and is maintained by John Magan - john.magan@dg3.cec.be