Workshop on Embedded Systems Design, Brussels, 8/4/2008
- Meeting:
- Avenue de Beaulieu 25 (BU25), room 0/S5
- Lunch:
- BU5 (self service) or BU29 (cafeteria)
Venue
List of external participants
- Bruno Bouyssounouse, VERIMAG
- Eric Conquet, ESA
- Wolfgang Herzner, ARCS
- Drora Goshen, IAI
- Antonio Kung, TRIALOG
- Andreas Schallenberg, University of Oldenburg
- Andre Vandemeulebroecke, ST
- Rapporteur: James Heaton, JH Associates
Objectives
To assess what was accomplished on the recent past and to help define future research vectors on this area.
Agenda
- 08:30 Registration
- 09:00 Opening
- Konstantinos Glinos, HoU, DG INFSO G3
- 09:15 Presentations (NoE)
- ARTIST2 - Bruno Bouyssounouse, VERIMAG ( 385KB)
- 10:00 Discussion
- 10:45 Coffee break
- 11:00 Presentations (IPs)
- ASSERT - Eric Conquet, ESA ( 162KB)
- DECOS - Wolfgang Herzner, ARC
- SPEEDS - Drora Goshen, IAI ( 319KB)
- 12:00 Discussion
- 12:45 Lunch break
- 14:00 Presentations (STREPs)
- HIJA - Antonio Kung, TRIALOG ( 74KB)
- ICODES - Andreas Schallenberg, University of Oldenburg ( 1.191KB)
- VERTIGO - Andre Vandemeulebroecke, ST ( 96KB)
- 15:00 Discussion
- 15:45 Coffee break
- 16:00 FP7 Call 1 and future calls
- Philippe Reynaert, DG INFSO G3 ( 54KB)
- MOGENTES - Wolfgang Herzner, ARC ( 159KB)
- 16:30 Discussion
- 17:00 Summary
- James Heaton, JH Associates
- 17:15 Closing
Additional Material
You can download the participant's info pack ( 1.760KB) and the final report ( 214KB) of the workshop.