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Paper deadline : 3 March, 1997
Workshop : 1-3 September, 1997
Imperial College of Science, Technology and Medicine, University of London, UK
AIM
The aim of this workshop is to bring together workers from throughout
the world for a wide ranging discussion of all forms of field
programmable logic, particularly field programmable gate arrays and
complex programmable logic devices, and their applications. It is
intended to discuss the increasing range of device types, industrial
applications, advanced design tool development, research applications,
novel system architectures and educational experiences. The workshop
will include regular presentations, posters and discussion sessions,
and it is expected that most of the delegates will wish to make some
contribution to one or more of these. The workshop is the seventh in
a series of workshops which were held in Oxford (1991, 1993 and 1995),
Vienna (1992), Prague (1994) and Darmstadt (1996).
CALL FOR CONTRIBUTIONS
Contributions are invited for regular presentation, poster and
discussion sessions. Prospective authors are invited to submit by 3rd
March, 1997 an abstract of around 500 words or, preferably, a full paper
to:
FPL97 Programme Secretary
Department of Computing
Imperial College of Science, Technology and Medicine
180 Queen's Gate
London
SW7 2BZ
United Kingdom
Telephone: +44 171 594 8313
Fax: +44 171 581 8024
e-mail: fpl97@doc.ic.ac.uk
Please preface this by your full correspondence address including email
and fax, a list of (at most) 5 one-line statements that best encapsulate
the essence of your proposed contribution, and a note of your preferred
presentation format. Please mail 10 copies if possible, but submissions
by email or fax will be accepted.
Notification of acceptance will be posted by 5th May, 1997 and full
papers must be received by 27th June to guarantee distribution at the
workshop. Potential exhibitors and tutorial presenters are invited to
contact FPL97 Programme Secretary at the above address.
SCOPE
Field Programmable Logic has been available for a number of years, but
the increasing power and variety of devices now available is extending
its role from that of simply being a convenient way of implementing
the system `glue logic' to an increasing ability to implement mainstream
system functions. The speed with which devices can be programmed makes
them ideal for prototyping and for education; the reprogrammable devices
are opening up sophisticated new applications and new hardware/software
trade-offs. Computer-based tools are being developed for automatic
compilation of advanced designs, and routes to custom circuits are now
available.
The scope of the workshop includes, but is not limited to, the following
aspects:
* Novel device, machine and system architectures
* New software and hardware development tools
* Run-time reconfigurable and partially reconfigurable designs
* High-level design and compilation research
* Industrial applications and experiences
* Trade-offs between devices, architectures and technologies
* Benchmark comparisons
* Smart applications
* Custom computers
* Hardware/software co-design using field programmable devices
* Evolvable and adaptable systems
* ASIC emulators, hardware modellers and compiled accelerators
* Fault modelling, testability methods and reliability issues
* Educational experiences and opportunities
ORGANISATION
General Co-Chairs: Wayne Luk and Peter Y.K. Cheung, Imperial College, UK
Programme Chair: Manfred Glesner, Darmstadt University of Technology,
Germany
Programme Committee: Doug Amos, Jeff Arnold, Peter Athanas, Stephen
Brown, Klaus Buchenrieder, Bernard Courtois, Keith Dimond, Carl
Ebeling, Patrick Foulk, Norbert Fristacky, Herbert Gruenbacher, Reiner
Hartenstein, Udo Kebschull, Andres Keevallik, Patrick Lysaght, Will
Moore, Klaus Mueller-Glaser, Wolfgang Nebel, Peter Noakes, Franco Pirri,
Jonathan Rose, Zoran Salcic, Mariagiovanna Sami, Michal Servit, Stephen
Smith, Steve Trimberger.
LOCAL DETAILS
The workshop will be held from 1st to 3rd September, 1997 at the
South Kensington campus of Imperial College of Science, Technology
and Medicine. South Kensington is an area in western central London
long established as a cultural centre for the arts, sciences, music,
learned societies and institutions. It is also home to several major
national museums. The South Kensington campus is located within five
minutes walk of Hyde Park and Kensington Gardens to the north. London
has numerous cultural and tourist attractions as well as plenty to
interest accompanying partners. There are fast connections to various
international airports including Heathrow, Gatwick, London City and
Stansted. Participants of FPL97 will be given special rates for staying
at hotels and college accommodation close to the workshop venue.
Further details can be obtained from:
Dr. Wayne LUK
Department of Computing
Imperial College of Science, Technology and Medicine
180 Queen's Gate
London
SW7 2BZ
United Kingdom
Telephone: +44 171 594 8313
Fax: +44 171 581 8024
e-mail: w.luk@doc.ic.ac.uk