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Nanotechnology Information Devices (NID)
Proactive Initiative in the 5th Framework Programme (1998-2002)
Emerging Nanoelectronics: New Initiative in FP6
- Introduction - Scope - Objectives
- Funded Projects in the 5th Framework Programme
- Workshops / Related Events
- Background info
- Nano Electronics Roadmap - Edition 2000
- Contacts
Introduction
Nanotechnology Information Devices (NID) is an initiative on future information processing and storage systems that operate at the atomic or molecular-scale in order to achieve superior functionality or performance.
Scope
The NID pro-active initiative supports innovative research aimed at the development of new concepts for information processing systems operating at the nano-scale. NID draws from work under the previous MEL ARI initiative while broadening the scope to cover any research field that could contribute in shaping future visions for information processing nano-systems, from quantum electronics to nano-mechanics and biology. NID gives increased emphasis to radically new approaches and cross-disciplinary integration.
Objectives
There are three inter-related objectives.
- Development of novel architectures and designs for information processing systems that are adequate for nano-scale implementation: Nano-scale system architectures may have to be fault-tolerant and self-testing, highly parallel or redundant, delay insensitive, or even able to use power generated locally. They may need to be demonstrated at a macroscopic scale first, before nano-scale implementation.
It is expected that developments and expertise from areas such as computer science, biology or neuro-informatics, would be catalytic in generating and developing new concepts.
- Development of novel devices: the aim is to demonstrate at least a logic gate, memory cell, or other elementary processor. Key issues are scalability, projected power consumption, and potential for room temperature operation. Interfacing to the macroscopic world should be considered. The development of the appropriate functional materials and structures is part of the expected work.
- Development of tools and techniques for the fabrication of structures with critical dimensions below 10 nm. Potential scalability and cost are key issues. Emphasis will be given on the combination of concepts and techniques originating from organic chemistry and bioengineering with surface patterning and nano-manipulation techniques. Self-organisation, self-assembly, directed nano-assembly and associated micro- or nano-tools are all included in the scope.
Workshops / Related actions
- Network on NANOELECTRONICS : PHANTOMS
- Earlier Workshops on PHANTOMS website: go to PHANTOMS info events
Background Info
Since the early seventies, the microelectronics industry has followed Moore's law doubling the processing power of its chips every 18 months. This performance increase has been achieved mainly by reducing the size of circuit features and the optimisation of CMOS technology. Minimum feature size passed from 10 microns in 1970 to 0.25 microns in 1998; 0.05 microns are envisaged by 2012, where less than 1000 electrons would be used in switching currents. Although single MOSFETs with sizes almost down to 10 nm have already been demonstrated, severe technological obstacles in terms of interconnect technology, dielectric materials, litho-graphy, and design complexity may slow down further progress. Such a slow down may also be the result of financial considerations: In 1997 the cost of a new factory was of the order of €1.3 billion and is expected to reach 5 billion by 2006. Huge investment costs either for R&D or new fabs may thus make progress along Moore’s law financially untenable in the next 10 years, thus opening a window of opportunity to new approaches that break away from conventional miniaturisation.
The MicroELectronics Advanced Research Initiative was launched in 1996 to respond to this challenge (see cordis.europa.eu/ esprit/src/melari.htm). Fourteen projects have been supported under the "nano-scale ICs" part of this programme, which focused on developing novel nano-scale devices and circuits as well as associated nano-fabrication technology.
Since MEL ARI was launched, two things have become increasingly clear:
Firstly, nano-scale systems cannot and should not be seen as the successors to CMOS technology from either the technical or the application perspective. The exploitation of atomic and molecular scale behaviour may ultimately require completely different materials, processes, and device architectures than the current technology, originally designed to work on the basis of macroscopic effects. General purpose computing may also remain an application area dominated by CMOS technology even in the distant future, with novel devices building their own markets.
Secondly, significant breakthroughs are more likely to arise at the interfaces between traditionally separate science and technology areas. For example, principles and techniques for self-organisation, nano-assembly and self-repair may be borrowed from biology. Neural networks and evolutionary programming may provide inspiration for the development of novel architectures for nano-scale systems.
Contacts
For further information please feel free to contact:
Patrick Van Hove
Email: Patrick Van-Hove
Tel. +32-2-296 81.06