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To develop, ahead of the ITRS international roadmap, semiconductor devices shrunk by an order of magnitude down to the 5 nm size, and alternative devices for the post-CMOS era. Research will also aim at enabling the design in-time and at cost, of reliable 1 billion gate systems-on-chip or systems-in-package, improving productivity by a factor of 10 by 2010. This will help prepare for the electronic components of 2010 and beyond.
The Strategic Objective 'Pushing the limits of CMOS and preparing for post-CMOS' is included within Call 1 of the IST priority .
|Publication date||Closure date||Pre-allocate budget 1 (M€)||Instruments||Status|
|17 December 2002||24 April 2003||75||All 2||Closed|
Commission's contact person for the IST calls 2003-2004
- Georg Kelm (email removed)
The amount corresponds to the 80% of the budget which is pre-allocated.
2 'All instruments' correspond to IPs , NoEs , STREPs , CAs , and SSAs .