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Specialisable, Programmable, Efficient and Robust Microprocessors

Ziel

The development of faster, cheaper and smaller transistors has been the driving force behind the exponential growth in computing power over the past 50 years. While our ability to fabricate better transistors has not yet ceased, continuing to translate these advances into better system-level performance is now a major challenge. This proposal seeks to research a new approach to building programmable digital systems, one that can offer the efficiency, robustness and flexibility required as we approach the end of the CMOS era and start to introduce new post-CMOS technologies. The ideas are centred upon a novel network-centric multiprocessor architecture, with contributions planned at every level from the circuit to the language level.

Aufforderung zur Vorschlagseinreichung

ERC-2012-StG_20111012
Andere Projekte für diesen Aufruf anzeigen

Gastgebende Einrichtung

THE CHANCELLOR MASTERS AND SCHOLARS OF THE UNIVERSITY OF CAMBRIDGE
EU-Beitrag
€ 1 271 216,00
Adresse
TRINITY LANE THE OLD SCHOOLS
CB2 1TN Cambridge
Vereinigtes Königreich

Auf der Karte ansehen

Region
East of England East Anglia Cambridgeshire CC
Aktivitätstyp
Higher or Secondary Education Establishments
Hauptforscher
Robert Mullins (Dr.)
Kontakt Verwaltung
Renata Schaeffer (Ms.)
Links
Gesamtkosten
Keine Daten

Begünstigte (1)