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Spintronic-Photonic Integrated Circuit platform for novel Electronics

Objective

The main objective of SPICE is to realize a novel integration platform that combines photonic, magnetic and electronic components. Its validity will be shown by a conceptually new spintronic-photonic memory chip demonstrator with 3 orders of magnitude higher write speed and 2 orders of magnitude lower energy consumption than state-of-the-art spintronic memory technologies. This enables, e.g. future petabit-per-second processor-memory bandwidths, required in a decade from now, and highly energy-efficient exascale datacenters with reduced carbon footprint. Such a versatile memory will result in so-called Universal Memory: one technology for all memory applications ranging from cache to storage.
The methods to achieve this are based on the recent discovery of magnetization reversal by short optical pulses. SPICE will bring this technique to the integrated circuit level by first developing free magnetic layers that can be optically switched into a magnetic-tunnel-junction layerstack, with optically transparent top contacts. These layers will then be processed into spintronic memory elements that can be electrically read. A novel short-pulse switching architecture will be designed and implemented in a silicon photonic integrated circuit. This photonic switching layer will then be combined with the spintronic memory layer to achieve an optically switched 8-bit memory with write efficiency of 600 fJ per bit: the proof of concept of the technology.
The novelty of SPICE is the convergence of the emerging fields of opto-magnetism and spintronics with electronic and photonic integration technologies. The ambition is to develop this technology in such a way that it can be compatible with future mature electronics fabrication processes, for real-world applications beyond 2025, thereby creating a new field. The SPICE platform is therefore foundational as it can be used not only for ultrafast and energy-efficient memory, but also for RF nano-oscillators and sensor technology.

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Topic(s)

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RIA - Research and Innovation action

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Call for proposal

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(opens in new window) H2020-FETOPEN-2014-2015

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Coordinator

AARHUS UNIVERSITET
Net EU contribution

Net EU financial contribution. The sum of money that the participant receives, deducted by the EU contribution to its linked third party. It considers the distribution of the EU financial contribution between direct beneficiaries of the project and other types of participants, like third-party participants.

€ 967 132,50
Address
NORDRE RINGGADE 1
8000 Aarhus C
Denmark

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Region
Danmark Midtjylland Østjylland
Activity type
Higher or Secondary Education Establishments
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Total cost

The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.

€ 967 132,50

Participants (5)

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