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Content archived on 2022-12-23

Synthesis of Image and Speech Processing Algorithms on Silicon

Objective

The project concerns research and development activities focused on synthesis of image and speech processing algorithms on silicon.

The technical activites will be:

algorithm design and evaluation of appropriate hardware architectures for VLSI implementation of image compression algorithms
derivation of detailed architectures for VLSI implementation, emphasising high speed and low power optimisations for image and speech processing
design and test of ASICs for two industrial applications with the aid of the CATHEDRAL software. The work is aimed at providing key components for commercial digital signal processing (DSP) products, so all aspects of ASIC design and testing have to be addressed.

At the same time, it is the objective to promote and demonstrate the research results of this project.

European links:

CATHEDRAL was developed in ESPRIT Project 2260 (SPRITE).

INFORMATION DISSEMINATION ACTIVITIES

CEDO will act as a service centre for prototype development and training for industry to implement new data compression algorithms with newly developed and/or commercial software tools. Workshops will be held in the countries of the East European partners, and industrial companies in these countries will be visited to explain the SISPAS opportunities available in CEDO, to look for practical designs and to organise for them a training period with real life designs in CEDO.

Topic(s)

Data not available

Call for proposal

Data not available

Coordinator

Interuniversity Microelectronics Centre (IMEC)
EU contribution
No data
Address
Kapeldreef 75
3001 Leuven
Belgium

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Total cost
No data

Participants (6)