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Sub half micron CMOS process for European users

Objetivo

- Availability of prototype processing capability in industrial pilot lines by 1996 of a true 0.35 micron CMOS, 3-4 metal, 3.3V process based on the next generation of lithographic tools offering process capability for complex products requiring high density of integration (10K gates/mm{2}) and high performances (> 0.5 mA/micron for NMOS and > 0.25 mA/micron for PMOS) with reduced power consumption.

- Process specifications and target design rules will be agreed with major end-users with reference to key applications.

- The 0.35 micron base process will be designed to provide also the base-line for further process developments such as analogue addressing specific markets and for an extension later to BICMOS.

SHAPE is concerned with development of the next generation of 0.35 micron CMOS logic technology. The new technology will be demonstrated by processing innovative VLSI circuits designed in cooperation with major European end-users. The project contains a first phase aiming at implementation and characterisation of process steps, followed by integration of a full CMOS process, targeting the most advanced performances needed by the semiconductor market. At a very early stage, design rules and processing capabilities will be offered to selected users in order to allow advanced system developments in Europe. The developments provide the opportunity for a close and focused cooperation among European semiconductor companies, electronic equipment manufacturers and research institutes to establish in Europe, within a competitive time frame, an early sub-half-micron processing and design capability.

Convocatoria de propuestas

Data not available

Régimen de financiación

CSC - Cost-sharing contracts

Coordinador

Sgs-Thomson Microelectronics Sa
Aportación de la UE
Sin datos
Dirección
Avenue Gallieni 7
94253 Gentilly
Francia

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Coste total
Sin datos

Participantes (6)