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Personal computer tools for the design of application specific integrated circuits

Objectif

- To establish a Best Practice design methodology within FINT in order to provide better products and to bring these products quicker to the market with a higher degree of success.

- To establish a design practice using VHDL. Evaluation of use of VHDL as a suitable tool for a small size company with minimal experience in high level description of design. The design time and efficiency of the design will be compared with schematic design tools.

- It is further aimed to establish a design practice using FPGA as a development and test tool before the final implementation is done in ASIC. The design will be functionally tested using FPGAs. The library-modules are different for the two technologies and the intention is to work in different design environments in the two cases.

- The main results expected are tools and experience in using such tools that allow FINT to develop products with a higher degree of functionality with a faster and safer design time. Experience will be acquired in design time and in design efficiency in terms of design errors and how this is affected by the design tools.

- These experiences will be shared with other companies through the Norwegian IT Industries Technological Fora and through presentation at relevant workshops such as the CAD Forum.

PCASIC is an Application Experiment which aims to provide FINT with experience with state-of-the-art design methods in digital microelectronics and establish a safer design route with minimum risk of reruns on developed ASIC designs.

Appel à propositions

Data not available

Coordinateur

Fieldbus International As
Contribution de l’UE
Aucune donnée
Adresse

0314 Blindem
Norvège

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Coût total
Aucune donnée