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  • Verification and validation of embedded system design workbench that is how to make sure that systems controlled by intelligent electronic chips will satisfy certain safety conditions
FP6

VERTIGO

Project ID: 033709
Financiado con arreglo a

Verification and validation of embedded system design workbench that is how to make sure that systems controlled by intelligent electronic chips will satisfy certain safety conditions

Desde 2006-06-01 hasta 2008-11-30 | VERTIGO Sitio web

Detalles del proyecto

Coste total:

EUR 3 037 366

Aportación de la UE:

EUR 2 100 000

Coordinado en:

Italy

Régimen de financiación:

STREP - Specific Targeted Research Project

Objetivo

Coordinador

STMICROELECTRONICS SRL
Italy
VIA OLIVETTI 2
20041 AGRATE BRIANZA
Italy
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Participantes

AERIELOGIC SARL
France
4 AVENUE DE CAMBRIDGE, IMMEUBLE ODYSSE, CITIS
14200 HEROUVILLE ST CLAIR
France
LINKÖPINGS UNIVERSITET
Sweden
Campus Valla
LINKÖPING
Sweden
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TALLINNA TEHNIKAUELIKOOL
Estonia
EHITAJATE TEE 5
19086 TALLINN
Estonia
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TRANSEDA SYSTEMS LTD
United Kingdom
SWALLOWFIELD HOUSE, BATH ROAD, FROXFIELD
SN8 3LD MARLBOROUGH
United Kingdom
UNIVERSITA DEGLI STUDI DI VERONA
Italy
VIA DELL' ARTIGLIERE 8
37129 VERONA
Italy
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UNIVERSITY OF SOUTHAMPTON
United Kingdom
HIGHFIELD
SO17 1BJ SOUTHAMPTON
United Kingdom
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