Project description
Next-Generation Nanoelectronics Components and Electronics Integration
Duallogic is to develop a dual-channel below 22 nm CMOS technology comprising high channel mobility Ge pMOS and III-V compound semiconductor nMOS transistors on the same Si substrate
We propose to develop for the first time a dual-channel CMOS technology comprising high channel mobility (high-µ) Ge pMOS and III-V compound semiconductor nMOS transistors co-integrated on the same complex engineered substrate on Si. This offers a high performance booster as an option for the 22 nm technology creating competitive advantage for the European nanoelectronics industry. In addition, high-µ dual channel CMOS could be the main new introduction in sub-22 nm nodes in agreement with the strategic planning of the ENIAC technology platform. The project will develop the full set of FEOL modules from the starting local GeOI substrate to the dual-channel engineered substrate, the high-k/metal gate stacks and the S/D junctions with low resistivity contacts. Our aim is to use surface inversion channels and a self-aligned process with implanted S/D contacts for both III-V and Ge MOSFETs to ensure compatibility with the scaling and operation rules of CMOS. Device modelling and circuit design will assist in selecting the most suitable device architecture. The technology will be validated by the successful co-integration of short channel functional transistors using a 65 nm/200 mm pilot semiconductor processing line. This will allow characterization in terms of mobility at short gate lengths and identification of possible showstoppers associated with the behavior of high-µ channels at nanoscale dimensions. In addition, using toolsets, process flows and know how similar to Si, we aim at demonstrating that the high-µ dual channel technology is scalable and manufacturable without the need for introducing costly and disruptive technologies, thus ensuring the CMOS evolution for next generations. Mobilizing major technology development laboratories in Europe along with leading semiconductor and information technology industry and key semiconductor equipment manufacturers, this project can be a catalyst to the effort for maintaining competence in manufacturing and IP in Europe
Fields of science (EuroSciVoc)
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
- natural sciences physical sciences electromagnetism and electronics semiconductivity
- natural sciences chemical sciences catalysis
- engineering and technology nanotechnology nanoelectronics
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Programme(s)
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Multi-annual funding programmes that define the EU’s priorities for research and innovation.
Topic(s)
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Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.
Call for proposal
Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.
Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.
FP7-ICT-2007-1
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Funding Scheme
Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.
Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.
Coordinator
15 341 AGIA PARASKEVI
Greece
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