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Investigation of All Aspects of the Interconnection of High Pincount ICs

Ziel

The objectives of this project were to develop:
-alternative methods of connecting the integrated circuit to its interconnection medium; this was seen to be particularly appropriate for devices fabricated according to the end-user's design with high pincount
-large-area (30x30cm) high-density (250/125micron pitch) interconnections using multilayer polymer techniques (since polymers are very low in cost and layers can be superimposed quite easily)
-medium-area (17.5x12.5cm) ultra-high-density (50/25micronpitch) interconnections based on a combination of thick-film dielectrics and additive base metal electroplating methods.
The goal was to realise all interconnect systems with just two signal layers, thereby achieving low cost through reduced handling and inexpensive materials.
The objectives of this project were to develop:
alternative methods of connecting the integrated circuit to its interconnection medium;
large area (30 cm x 30 cm) high density (250/125 micron pitch) interconnections using multilayer polymer techniques;
medium area (17.5 cm x 12.5 cm) ultra high density (50/25 micron pitch) interconnections based on a combination of thick film dielectrics and additive base metal electroplating methods.

The deposition of copper on silicon was studied. 10 microns wide and 3 microns high copper tracking with a conductivity close to bulk copper has been realised on the passivation of silicon integrated circuits (IC). A system using screen printed polymer thick film material has given good results at 250 micron resolution in structures of at least 2 layers.

The process for producing ultra high density interconnection patterns on aluminia substrates using a combination of copper plating technology and laser drilled vias in thick film dielectric has been established, with good results (25 micron pitch) achieved. This combines the advantages in reliability and thermal performance of thick film with the conductivity and line definition obtainable from electroplated copper. The process already developed yields tracking down to 25 microns in width with thickness up to 25 microns over areas up to 50 mm square.
The deposition of copper on silicon was studied. The aim was to deposit high conductivity copper tracks on the passivation layer of an IC. Ten microns wide and 3microns high copper tracking with a conductivity close to bulk copper has been realised on th e passivation of siliconICs.
A system using screen-printed polymer thick-film material has given good results at 250micron resolution in structures of at least two layers. It was found that the benefits of such a system lie not so much in high track density but rather in the realisa tion of a large-area medium-density interconnection on an organic substrate that cannot withstand high processing temperatures. For that reason the original target of 125micron pitch was not further pursued.
The process for producing ultra-high-density interconnection patterns on aluminia substrates using a combination of copper plating technology and laser drilled vias in thick film dielectric has been established, with good results (25micronpitch) achieve d. This combines the advantages in reliability and thermal performance of thick film with the conductivity and line definition obtainable from electroplated copper. The process already developed yields tracking down to 25microns in width with thickness u p to 25microns over areas up to 50mmsquare. The limitation on size comes from undercutting during chemical etching. The reactive ion etcher purchased by British Aerospace at the end of the project showed, however, better results should a larger area ofextreme density ever be required by a practical application.
The copper tracking has application for the distribution of power in VLSI and waferscale circuits where the areas and current requirements may impede the use of conventional metallisations.
Exploitation
A new small dedicated processing equipment line based on thick dielectric films was set up by BAe. The low-cost multilayer polymer techniques, which are of prime interest for the industrial printed circuit board manufacturer, have been introduced since 1988 by Lucas Stability Electronics for the realisation of their current products. In addition, NMRC is applying the results of the first objective in WSI applications (Project824).

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NATIONAL MICROELECTRONICS RESEARCH CENTRE
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PROSPECT ROW
X CORK
Irland

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