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DIAMOND

Project reference: 248613
Funded under: FP7-ICT

Diagnosis, Error Modelling and Correction for Reliable Systems Design [Print to PDF] [Print to RTF]

From 2010-01-01 to 2012-12-31

Project details

Total cost:

EUR 3 863 697

EU contribution:

EUR 2 893 000

Coordinated in:

Estonia

Call for proposal:

FP7-ICT-2009-4

Funding scheme:

CP - Collaborative project (generic)

DIAMOND develops methodology and integrated environment for diagnosis and correction of errors regarding the design and implementation of digital ICs.

The aim of DIAMOND project is improving the productivity and reliability of semiconductor and electronic system design in Europe by providing a systematic methodology and an integrated environment for the diagnosis and correction of errors. Increasing design costs are the main challenge facing the semiconductor community. Assuring the correctness of the design contributes to the major part of the problem. However, while diagnosis and correction of errors are more time-consuming compared to error detection, they have received far less attention, both in terms of research works and industrial tools introduced. Another, orthogonal threat to the development is the rapidly growing rate of soft-errors in the emerging nanometer technologies. According to roadmaps, soft-errors in sequential logic are becoming a more severe issue than in memories. However, the design community is not ready for this challenge because existing soft-error escape identification methods for sequential logic are inadequate. The DIAMOND project aims at developing a unified, holistic diagnostic model for design and soft errors as well as automated localisation and correction techniques based on the unified model, both pre-silicon and post-silicon. In addition work will be directed to the implementation of a reasoning framework for localisation and correction, encompassing word-level techniques, formal, semi-formal, and dynamic techniques and to the integration of automated correction with the diagnosis methods. DIAMOND reaches beyond the state-of-the-art by proposing an integrated approach to localisation and correction of specification, implementation, and soft errors. In addition, it considers faults on all abstraction levels, from specification through implementation down to the silicon layout. Handling this full chain of levels allows DIAMOND take advantage of hierarchical diagnosis and correction capabilities incorporating a wide range of error sources.

Objective

Increasing design costs are the main challenge facing the semiconductor community. Assuring the correctness of the design contributes to the major part of the problem. However, while diagnosis and correction of errors are more time-consuming compared to error detection, they have received far less attention, both, in terms of research works and industrial tools introduced.\nAnother, orthogonal threat to the development is the rapidly growing rate of soft-errors in the emerging nanometer technologies. According to roadmaps, soft-errors in sequential logic are becoming a more severe issue than in memories. However, the design community is not ready for this challenge because existing soft-error escape identification methods for sequential logic are inadequate.\n\nThe DIAMOND project addresses the above-mentioned challenges. The aim of DIAMOND is improving the productivity and reliability of semiconductor and electronic system design in Europe by providing a systematic methodology and an integrated environment for the diagnosis and correction of errors. DIAMOND will develop:\n\n- A unified, holistic diagnostic model for design and soft errors;\n- Automated localisation and correction techniques based on the unified model, both pre-silicon and post-silicon;\n- Implementation of a reasoning framework for localisation and correction, encompassing word-level techniques, formal, semi-formal, and dynamic techniques;\n- Integration of automated correction with the diagnosis methods.\nDIAMOND reaches beyond the state-of-the-art by proposing an integrated approach to localisation and correction of specification, implementation, and soft errors. In addition, it considers faults on all abstraction levels, from specification through implementation down to the silicon layout. Handling this full chain of levels allows DIAMOND take advantage of hierarchical diagnosis and correction capabilities incorporating a wide range of error sources.

Related information

Coordinator

TALLINNA TEHNIKAULIKOOL
Estonia
Ehitajate tee 5
TALLINN, Estonia
Administrative contact: Liina Kotkas
Tel.: +372 6203531
Fax: +372 6202020
E-mail

Participants

TECHNISCHE UNIVERSITAET GRAZ
Austria
RECHBAUERSTRASSE
GRAZ, Austria
Administrative contact: Melanie Blauensteiner
Tel.: +43 316 873 5514
Fax: +43 316 873 5520
E-mail
UNIVERSITAET BREMEN
Germany
Bibliothekstrasse
BREMEN, Germany
Administrative contact: Carsten Meier
Tel.: +4942121860550
Fax: +494212188785
E-mail
OÜ TESTONICA LAB
Estonia
Õismäe tee
Tallinn, Estonia
Administrative contact: Artur Jutman
Tel.: +372 5179012
Fax: +372 6202253
E-mail
IBM ISRAEL - SCIENCE AND TECHNOLOGY LTD
Israel
94 DERECH EM-HAMOSHAVOT
PETACH TIKVA, Israel
Administrative contact: Efrat Shalom-Hillman
Tel.: +97248281101
Fax: +97248296101
E-mail
LINKOPINGS UNIVERSITET
Sweden
CAMPUS VALLA
LINKOPING, Sweden
Administrative contact: Erik Larsson
Tel.: +46 13 286619
Fax: +4613281002
E-mail
ERICSSON AB
Sweden
TORSHAMNSGATAN 23
STOCKHOLM, Sweden
Administrative contact: Gunnar Carlsson
Tel.: +46 8 719 1919
Fax: +46 10 713 3600
E-mail
TRANSEDA SYSTEMS LTD
United Kingdom
Swallowfield House, Bath Road, Froxfield
Marlborough, United Kingdom
Administrative contact: Stephen Scholefield
Tel.: +4408706260631
Fax: +4408706260631
E-mail
Record Number: 93760 / Last updated on: 2014-10-06