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SQWIRE

Project ID: 257111
Financé au titre de

Silicon Quantum Wire Transistors

De 2010-09-01 à 2013-08-31, projet clôturé | SQWIRE Site web

Détails concernant le projet

Coût total:

EUR 4 326 034

Contribution de l'UE:

EUR 3 150 000

Coordonné à/au(x)/en:

Ireland

Appel à propositions:

FP7-ICT-2009-5See other projects for this call

Régime de financement:

CP - Collaborative project (generic)

Description

SQWIRE develops industry compatible CMOS technology based on novel Si nanowire transistor structures.

The aim of the SQWIRE project is to develop a disruptive, industry-compatible CMOS technology based on novel silicon nanowire transistor structures. As has been demonstrated both theoretically and experimentally, nanowire MOS transistors can be fabricated at wafer level using silicon-on-insulator (SOI) substrates and these novel devices have shown electrical properties that are comparable or even superior to those of regular transistors. Two such novel devices are the Gated Resistor (a junctionless transistor simulated, prototype fabricated and patented) and the variable-barrier tunnel transistor (VBT, simulated and patented). To obtain industrial validation, fabrication routes will be developed for these devices on novel 300 mm SOI wafers with silicon film thicknesses of only 10 nm. These routes will be underpinned by process development targeting atom-scale control of the silicon film thickness across the wafer. Device performance will be characterised at die-level and evaluated in a statistically meaningful manner at wafer level. The extracted parameters will serve as the basis for the development of a compact model of the Gated Resistor devices, which can be used for further circuit design and the validation of advanced numerical simulations. The fabrication process for the first device (Gated Resistor) is less complex and more flexible than that of regular transistors. It has the potential of increasing yield and reducing the price of integrated circuits. Furthermore, the Gated Resistor offers the promise of superior scaling to sub-22 nm dimensions compared to regular transistors. In addition, the process can easily be implemented in semiconductor materials other than silicon. The second device (Variable Barrier Transistor) is capable of providing subthreshold slopes sharper than any conventional transistor. This permits one to reduce the supply voltage of integrated circuits, and hence their energy consumption.

Objectif

The aim of the SQWIRE project is to develop a disruptive, industry-compatible CMOS technology based on novel silicon nanowire transistor structures. The co-ordinator has demonstrated both theoretically and experimentally that nanowire MOS transistors can be fabricated at wafer level using silicon-on-insulator (SOI) substrates. These novel devices have shown electrical properties that are comparable or even superior to those of regular transistors.Two such novel devices are the Gated Resistor (a junctionless transistor simulated, prototype fabricated and patented) and the variable-barrier tunnel transistor (VBT, simulated and patented). To obtain industrial validation, fabrication routes will be developed for these devices on novel 300 mm SOI wafers with silicon film thicknesses of only 10 nm. These routes will be underpinned by process development targeting atom-scale control of the silicon film thickness across the wafer.Device performance will be characterised at die-level and evaluated in a statistically meaningful manner at wafer level. The extracted parameters will serve as the basis for the development of a compact model of the Gated Resistor devices, which can be used for further circuit design and the validation of advanced numerical simulations.The fabrication process for the first device (Gated Resistor) is less complex and more flexible than that of regular transistors. It has the potential of increasing yield and reducing the price of integrated circuits. Furthermore, the Gated Resistor offers the promise of superior scaling to sub-22 nm dimensions compared to regular transistors. In addition, the process can easily be implemented in semiconductor materials other than silicon. The second device (Variable Barrier Transistor) is capable of providing subthreshold slopes sharper than any conventional transistor. This permits one to reduce the supply voltage of integrated circuits, and hence their energy consumption.

Coordinateur

UNIVERSITY COLLEGE CORK, NATIONAL UNIVERSITY OF IRELAND, CORK
Ireland

Contribution de l'UE: EUR 690 851


Western Road
- CORK
Ireland
Activity type: Higher or Secondary Education Establishments
Contact administratif: Conor Delaney
Tél.: +353 21 490 4263
Fax: +353 21 4904058

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Participants

MAGWEL NV
Belgium

Contribution de l'UE: EUR 284 499


MARTELARENPLEIN 13
3000 LEUVEN
Belgium
Activity type: Private for-profit entities (excluding Higher or Secondary Education Establishments)
Contact administratif: Bart De Smedt
Tél.: +32 16 46 86 88
Fax: +32 16 46 86 89

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INTERUNIVERSITAIR MICRO-ELECTRONICACENTRUM IMEC VZW
Belgium

Contribution de l'UE: EUR 363 006


KAPELDREEF 75
3001 LEUVEN
Belgium
Activity type: Research Organisations
Contact administratif: Christine Van Houtven
Tél.: +3216281613
Fax: +3216281812

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UNIVERSITAT ROVIRA I VIRGILI
Spain

Contribution de l'UE: EUR 251 036


CARRER DE L'ESCORXADOR
43003 TARRAGONA
Spain
Activity type: Higher or Secondary Education Establishments
Contact administratif: Rosa Solà Alberich
Tél.: +34 977559522
Fax: +34 977558278

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SOITEC SA
France

Contribution de l'UE: EUR 125 113


CHEMIN DES FRANQUES - PARC TECHNOLOGIQUE DES FONTAINES
38190 BERNIN
France
Activity type: Private for-profit entities (excluding Higher or Secondary Education Establishments)
Contact administratif: Nelly Kernevez
Tél.: +33 4 76 92 96 23
Fax: +33 4 76 92 94 31

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COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
France

Contribution de l'UE: EUR 951 673


Rue des Martyrs 17
38054 Grenoble Cedex 09
France
Activity type: Research Organisations
Contact administratif: Marie-Laure Page
Tél.: +33 4 38782396
Fax: +33 4 38785183

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INSTITUT POLYTECHNIQUE DE GRENOBLE
France

Contribution de l'UE: EUR 289 424


AVENUE FELIX VIALLET 46
38031 GRENOBLE CEDEX 1
France
Activity type: Higher or Secondary Education Establishments
Contact administratif: Valerie Miscioscia
Tél.: +33456529505
Fax: +33456529501

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INTEL RESEARCH AND INNOVATION IRELAND LIMITED
Ireland

Contribution de l'UE: EUR 194 398


COLLINSTOWN INDUSTRIAL ESTATE
. LEIXLIP KILDARE
Ireland
Activity type: Private for-profit entities (excluding Higher or Secondary Education Establishments)
Contact administratif: Bernard Capraro
Tél.: +353 1 606 4228
Fax: +353 1 606 4210

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UNIVERSITE JOSEPH FOURIER GRENOBLE 1
France

Contribution de l'UE: EUR 0


Avenue Centrale, Domaine Universitaire 621
38041 GRENOBLE
France
Activity type: Higher or Secondary Education Establishments
Contact administratif: N/A N/A
Tél.: +00 0 000000

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CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE CNRS
France

Contribution de l'UE: EUR 0


RUE MICHEL ANGE 3
75794 PARIS
France
Activity type: Research Organisations
Contact administratif: N/A N/A
Tél.: +00 0 000000

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