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Content archived on 2024-05-28

100 Gb/s Optical RAM on-chip:\nSilicon-based, integrated Optical RAM enabling High-Speed Applications in Computing and Communications

Project description


FET Open

For over two decades ICT witnesses the steadily increasing gap between processor and memory speed. RAM is too slow to keep up with processor speeds, creating a bottleneck in system performance. To address this, RAMPLAS will revisit RAM fundamentals and will lay the foundations for optical RAM technology and for optical RAM-enabled green and ultra-fast computing architectures. RAMPLAS will develop the first 100GHz optical RAM chips and will foster a new framework of disciplines for its effective application in ICT.RAMPLAS cross-disciplinary workplan blends innovation in computer science, optical design, photonic integration and semicondictor physics. It aims to provide the theoretical foundations of optical RAM and to introduce novel optical RAM circuit designs. A building block approach will associate circuit design with physical layer parameters. Novel epitaxial methods will be employed for the fabrication of ultrafast dilute-nitride-antimonide gain regions on GaAs (InGaAsNSb/GaAs) towards the deployment of active elements for 100GHz optical RAM. Heterointegration techniques will increase integration density on established SOI technology. Multi-bit RAM chips with up to 64-bit capacity are envisaged to pave the way to densely integrated optical RAMs and kByte capacities.RAMPLAS holistic approach addresses the entire framework for optical RAM-enabled computing. Fundamental connections between Content Distributed Networks and CMP architectures will be established to introduce the concepts of distributed optical cache. New 3D cache mapping algorithms will be researched, exploiting the wavelength dimension in memory addressing for Reconfigurable Set-Associative cache mapping towards maximizing cache hit ratio. The research outcomes of RAMPLAS will be evaluated in a solid proof-of-concept validation plan based both on simulations and experiments, intending to set the scene for new paradigms in Computing, Communications and Test & Measurement.

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Topic(s)

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FP7-ICT-2009-C
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Funding Scheme

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CP - Collaborative project (generic)

Coordinator

ETHNIKO KENTRO EREVNAS KAI TECHNOLOGIKIS ANAPTYXIS
EU contribution
€ 502 500,00
Address
CHARILAOU THERMI ROAD 6 KM
57 001 THERMI THESSALONIKI
Greece

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Region
Βόρεια Ελλάδα Κεντρική Μακεδονία Θεσσαλονίκη
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Participants (6)

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