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Advanced CMOS Technology for 10 A node

Project description

Pioneering Europe’s leap to the 10-ångström node

Shrinking transistors to boost chip performance is now pushing the limits of what’s physically possible. As the semiconductor industry moves towards the 10-ångström node, fresh breakthroughs are essential to keep pace with Moore’s Law. In this context, the EU-funded ACT10 project unites 32 partners working across the entire chipmaking process, from lithography and mask design to chip architecture and process monitoring. By addressing challenges in areas such as computational metrology, CFET devices, and high-NA lithography, ACT10 is laying the foundation for the next generation of CMOS chips. At the same time, the project strengthens Europe’s role as a centre for cutting-edge semiconductor manufacturing, supporting both new and established fabrication technologies.

Objective

The objective of the ACT10 project is to develop and demonstrate the required technology options, including their integration, for the 10Ångstrom node. The 32 participating partners cover a wide range of activities along the entire value chain for the manufacturing of CMOS chips. Activities include equipment development, computer aided design tooling and process technology development.
Essential parts of hardware, software and processing technology are developed pushing the boundaries of semiconductor design and manufacture to enable the new node and keep Moore’s law alive. The project aims to enhance the attractiveness of the EU as a location for new cutting-edge high volume and legacy node fabs. The ACT10 project is built based on the following four pillars.

1. Lithography Equipment and Mask Technology: Increase key-performance indicators in the optical system of High-NA Lithography machines, along with developing advanced mask processes and equipment to reach optical imaging requirements, and nonlinear optics material lifetime effects.
2. Chip design and Block Level validation; Assessment of different CFET devices and evaluate building blocks for digital and analog IPs.
3. Process Technology: development of innovative solutions for routing of the stacked n- and p-devices of the CFET architecture, development of 0.55NA (high-NA) single patterning solutions, and the development of semi-damascene BEOL for the 10Å node.
4. Computational Metrology and Process Monitoring Equipment: develop computational metrology methods, and develop metrology and inspection modules and equipment.

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Keywords

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Programme(s)

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Topic(s)

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Funding Scheme

Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.

HORIZON-JU-IA - HORIZON JU Innovation Actions

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Call for proposal

Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.

(opens in new window) HORIZON-JU-Chips-2024-1-IA

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Coordinator

ASML NETHERLANDS B.V.
Net EU contribution

Net EU financial contribution. The sum of money that the participant receives, deducted by the EU contribution to its linked third party. It considers the distribution of the EU financial contribution between direct beneficiaries of the project and other types of participants, like third-party participants.

€ 3 000 000,00
Address
DE RUN 6501
5504DR Veldhoven
Netherlands

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Region
Zuid-Nederland Noord-Brabant Zuidoost-Noord-Brabant
Activity type
Private for-profit entities (excluding Higher or Secondary Education Establishments)
Links
Total cost

The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.

€ 15 000 000,00

Participants (31)

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