ADAptive circuit techniques for current-mode ultra low-power diGItal Integrated Circuits

Objective

In the last years, the demand for ultra-low power integrated circuits with sub-1mW power consumption has been rapidly growing, due to the diffusion of applications relying on a large number of circuit nodes that are powered with tiny batteries or extract their energy from the environment (e.g. wireless sensor networks). These circuits must also be provided with sufficient computing capability for signal processing purposes, hence the design of ultra-low power digital circuits is a key aspect in this area. In this project, innovative circuit techniques to design ultra-low power digital circuits are developed. The MOS Current-Mode Logic (MCML) logic style is adopted in place of the standard sub-threshold CMOS logic, as MCML circuits were recently shown to be very well suited for ultra-low power operation thanks to the good control of their bias current. In addition, the prospective research activity targets the development of an efficient tuning scheme that adaptively varies the MCML gate bias current to compensate the inevitably large delay variations, adapt the power consumption to the available energy and the required performance, as well as to suppress the power contribution of inactive blocks. Accordingly, criteria and methods to design MCML standard cell libraries and use them in standard CAD design flows will be developed. To further reduce the consumption, an ultra-low voltage technique to halve the minimum supply voltage of MCML circuits will be introduced. Compared to sub-threshold standard CMOS logic, the joint adoption of the MCML logic style and the adaptive scheme is expected to significantly reduce the power consumption and to strongly enhance the circuit robustness against variations. Besides, the ability to tune the power consumption and the performance allows for using the same digital core for multiple applications, which is the premise to the design and the reuse of ultra-low power Intellectual Properties with assigned power specifications.

Fields of science (EuroSciVoc)

CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: https://op.europa.eu/en/web/eu-vocabularies/euroscivoc.

• engineering and technology electrical engineering, electronic engineering, information engineering electronic engineering signal processing
• engineering and technology electrical engineering, electronic engineering, information engineering electronic engineering sensors smart sensors

Keywords

Project’s keywords as indicated by the project coordinator. Not to be confused with the EuroSciVoc taxonomy (Fields of science)

• VLSI circuit design
• digital CMOS integrated circuits
• sensor networks
• ultra-low power digital circuits

Programme(s)

Multi-annual funding programmes that define the EU’s priorities for research and innovation.

• FP7-PEOPLE - Specific programme "People" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013)

Topic(s)

Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.

• FP7-PEOPLE-IOF-2008 - Marie Curie Action: "International Outgoing Fellowships for Career Development"

Call for proposal

Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.

FP7-PEOPLE-IOF-2008
See other projects for this call

Funding Scheme

Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.

MC-IOF - International Outgoing Fellowships (IOF)

Coordinator