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HDSPC Report Summary

Project ID: 338545
Funded under: FP7-JTI
Country: France

Final Report Summary - HDSPC (High dense smart power capacitor)

Executive Summary:
Performances and reliability improvement of passive power devices has become a major issue in the actual context of electrification of the transportation and energy industries. The High Dense Smart Power Capacitor (HDSPC) project has been launched in order to evaluate the potential of a new capacitor technology for the next generation of aircraft power converters. Technology demonstrators have been designed and manufactured and a new plastic film dielectric has been qualified for high miniaturization at 155-165°C. The technology has also shown good results for 155°C applications.
Metallized film capacitors are highly-reliable components due to low failure rates and to a secure open-circuit failure mode. However, health monitoring approaches can lead to optimized maintenance costs and to a significantly increased reliability. The HDSPC project has achieved the development of a diagnostic algorithm allowing the on-line monitoring of the DC-Link capacitor’s aging signature parameters. This is achieved through signal processing of current, voltage and temperature measurements at the capacitor’s leads. Moreover, an aging law for the capacitor’s capacitance value has been developed based on the physical phenomena occurring operation. The combination of these developments constitutes an efficient tool to provide in real time the capacitor’s effective remaining useful lifetime. This approach has been validated through simulations and experiments but its implementation into an actual converter still has to be performed.

Project Context and Objectives:
As a consequence of a more electrical evolution path, a major challenge relies on maintaining the reliability and availability standards of conventional electrical systems within a safer and demanding electrical network. Particularly, in critical power converters applications, where thermal, mechanical and electrical stresses are critical, DC-link capacitors appear as the most life-limiting devices. In this context, the High Dense Smart Power Capacitor (HDSPC) project, that is part of the European CleanSky project, deals with improving the performances and reliability of DC-link capacitors that will be used for the next generation of aircraft power converters. A particular attention is devoted to a novel and promising high-temperature plastic film dielectric technology. The HDSPC project aims at qualifying the potential and the maturity of this technology and of its manufacturing process in terms of operating temperatures and miniaturization. Although failure rates of such power devices have been greatly improved, reliability remains always a focus. It shall be permanently enhanced with the non-stop increasing demand within industry-driven requirements to operate in harsher environmental conditions. For this purpose, a monitoring solution of the DC-link capacitors is also investigated in the context of the project, with a final interest of providing warnings in advance of catastrophic failures.

Project Results:
In order to evaluate the potential of the novel PEN HV plastic film technology, single wounded capacitor prototypes have been characterized up to 190°C. The main electrical parameters, which are the capacitance, the equivalent series resistance, the dissipation factor and the insulation resistance, have been measured both in terms of frequency and temperature.
A very stable behavior has been obtained up to 125°C. Moreover, above this temperature, the following behavior has been observed:
- A positive drift of the capacitance up to 10% at 190°C
- A significant reduction of the insulation resistance but a stable behavior up to 190°C
- A pic of the dissipation factor at 160°C, followed by an important decrease, reducing further temperature increase (self-heating).

In conclusion, all the results indicate that the PEN HV technology seems to be a good choice for operating temperatures up to potentially 175°C.
In order to evaluate the reliability of the technology, aging tests under DC-voltage and steady temperature have been performed for two tests vehicles, 1µF and 10µF capacitors. To summarize, the aging tests results have led to the definition of two types of behavior:
o An open-circuit failure mode associated with a slow decrease of the capacitance. This failure mode is then considered as SAFE. Aging laws and acceleration factors can then be determined.

o A short-circuit failure mode associated with a strong decrease of the insulation resistance or an increase of the tangent of loss angle. This failure mode is considered as NOT SAFE and the associated stresses are considered OUTSIDE the datasheet SPECIFICATIONS (OUT-SPEC).
The 1µF and 10µF tests benches aging tests results have been compared respectively, based on these two types of behaviors. If, for example, the nominal operating point of (175°C, 270V) is considered, an open-circuit failure mode can be observed for the 1µF elements (5000h accumulated), whereas a short-circuit failure mode is observed for the 10µF elements (1000h accumulated).

This different behaviors show that even if the PEN HV technology itself can be considered qualified at 175°C, some improvements still have to be performed on the manufacturing process in order to qualify the final product at higher capacitance values.

An important result is that the nominal voltage of 270V can therefore be maintained safely with a temperature of 165°C, and the maximum voltage of 350V with a temperature of 155°C. Based on the results obtained in the context of the HDSPC project, a SAFE operating area has been defined. Moreover, another operating area has been defined for which the PEN HV technology is considered to be qualified, based on the results obtained for the 1µF elements, but improvements in the manufacturing process are still needed to qualify high capacitance values capacitors.

Previous studies and calculations indicate that the inter-layer pressure of a capacitor has a huge impact on the quality of the self-healing phenomenon and therefore on the performances and reliability of the capacitor. In fact, if a threshold inter-layer pressure is reached, the self-healing process is disrupted and the dielectric breakdown voltage is reduced. The lifetime of the capacitor is therefore significantly affected. A lower inter-layer pressure has therefore to be insured during the manufacturing process. However, if this pressure is too low, the equivalent permittivity of the films and air layers is reduced, leading to a decrease of the capacitor’s energy density. Moreover, if the pressure is too low, the capacitor’s dimensions are not stabilized and a significant evolution of the capacitance can be observed. An ideal pressure has therefore to be found to maximize miniaturization while insuring good self-healing properties. Discussions took place with the film supplier in order to determine the maximal admissible inter-layer pressure evolution with the applied operating voltage gradient. Models based on the PEN HV physical properties and on the winding and thermal treatment steps have been developed.
To summarize, the effect of the many parameters influencing the internal air pressure in the capacitor has been studied and modelled. The results were used to find a compromise between the winding parameters like speed and strain, but also the mechanical pressure applied on the wounded element, and of the thermal treatment parameters duration and intensity.

These improvements of the manufacturing process modelling will significantly help to improve the self-healing properties at high temperatures even for high-capacitance elements and blocs. This could improve the technology safe working area up to 175°C.
For reliability-critical equipment, safety and availability concerns are primordial to both users and manufacturers of power electronics devices. Although failure rates of power devices have been greatly improved these last decades, reliability remains always a focus. It shall be permanently enhanced with the nonstop increasing demand within industry-driven requirements to operate in harsher environmental conditions. From a designer point of view, exploring the major failure modes and failure mechanisms for a typical design and a specific mission profile, are crucial to guarantee the device’s operation for a specific period of time.

Generally, by applying accelerated ageing tests, an in-depth failure analysis can be performed, and potential failure root causes and design deficiencies can be explored. Based on these accelerated test results, empirical ageing laws are often used to estimate the component’s operating lifetime when subjected to thermal, electrical, electro-thermal, or environmental stresses. In this case, preventive maintenance could be applied which tend avoiding the total equipment shutdown (time-cost consuming operation) and limit the default occurrence. However, such models are empirical and do not give any information concerning the real deterioration state of the device and are based on a predefined end of life criteria. Such lack of information leads, in addition to the security margins taken by both designer and user of a given power electronics device, to a prescriptive replacement of a good operational item. Condition monitoring approaches are though needed to optimize the components health state estimation and thence optimize maintenance actions to obtain higher devices availability at a lower cost. The component is then replaced neither too early while it is still functional (preventive maintenance), nor too late, when the failure, sometimes catastrophic, has occurred (corrective maintenance). Optimal “predictive maintenance” is reached when the time of replacement meets the devices end of life criteria. This end of life criteria is a threshold value fixed by the designer for the drifting of the aging indicators, called precursor parameters.

A parametric identification technique that aims at developing an analytical model of the monitored capacitor based on experimental input and output measurements has therefore been developed. The fundamental idea is that the parameters characterizing the identified model will be sensitive to defaults occurring within the monitored device, and will therefore allow by their variations to track its degradation. The aim has been to estimate the aging signature parameters of the capacitor, the equivalent series resistance ESR and the capacitance C.

A condition monitoring approach has been proposed and tested on metallized polymer film capacitors based on this parametric estimation technique. The implemented approach ensures the double estimation of the capacitor’s precursor parameters (ESR and C), covering though most of the metallized film capacitors failure modes. Experimental test results demonstrated the ability of detecting potential deterioration drifts of dc-link capacitors when used notably in a switched mode 230 VAC/24 VDC power supply.
So, a novel condition monitoring approach of dc-link capacitors has been developed, based on the estimation of their equivalent series resistance and their capacitance. The proposed technique is done without adding any extra sensors or filters to the respective power converter scheme and no extra interferences, such as injected signals or special operation of the drive are neither required. This approach proved its efficiency on experimental signals provided from buck converter, however, a last step consists on implementing and testing the proposed approach within an FPGA in a real time operation of the system. The final interest will be to provide warnings in advance of catastrophic failures.

Potential Impact:
Passive devices and particularly capacitors are responsible for an important part of electronics systems failures. Moreover their performances, in terms of working temperature and miniaturization are a critical limitation in the design of power converters. Improving capacitors performances and reliability is therefore a key element to take up the challenge of designing the next generation of aircraft power converters. The HDSPC project has explored the potential of a novel dielectric material to significantly improve the performances of actual film capacitors. The final results already allows the development of high-dense high-temperature capacitors that extend the electrical performances of the best actual film capacitors at temperatures as high as 165-175°C. The expected applications cover the aerospace domain but also any power electronics domain requiring strong miniaturization at high temperatures. Moreover, the novel approach for the health monitoring of DC-link capacitors developed during the project allows significant improvement of the reliability of power converters and will allow anticipating future failures, reducing the maintenance costs. Finally, the development of high-performance components inside the European Union is of major importance to insure economic independence concerning critical devices.
The results obtained in the context of the HDSPC project have been exploited notably in two scientific publications:
- M. Makdessi, A. Sari, G. Aubard, P. Venet, C. Joubert and J. Duwattez, "Online health monitoring of metallized polymer film capacitors for avionics applications," 2015 IEEE 24th International Symposium on Industrial Electronics (ISIE), Buzios, 2015, pp. 1296-1301.
- M. Makdessi, A. Sari, P. Venet, G. Aubard, F. Chevalier, R. Préseau, T. Doytchinov, J. Duwattez, Lifetime estimation of high-temperature high-voltage polymer film capacitor based on capacitance loss, Microelectronics Reliability, Volume 55, Issues 9–10, August–September 2015, Pages 2012-2016
A patent has also been proposed for the health monitoring approach. The patent title is "PHM METHOD FOR AGING CAPACITORS".
The patent uses the prognostic approach described in the first paper and the aging law of the second paper to implement a diagnostic approach.

List of Websites:
No public website


Guillaume Aubard, (Innovation Manager)
Tel.: +33 160 317 601
Record Number: 191509 / Last updated on: 2016-11-10
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