Community Research and Development Information Service - CORDIS


TIPS Report Summary

Project ID: 644453
Funded under: H2020-EU.

Periodic Reporting for period 1 - TIPS (Thermally Integrated Smart Photonics Systems)

Reporting period: 2015-02-01 to 2016-07-31

Summary of the context and overall objectives of the project

The objective of this project is to develop and demonstrate a scalable, thermally-enabled 3D integrated optoelectronic platform that can meet the explosion in data traffic growth within ICT. The Thermally Integrated Smart Photonics Systems (TIPS) program will heterogeneously integrate micro-thermoelectric coolers (μTEC) and micro-fluidics (μFluidics) with optoelectronic devices (lasers, modulators, etc.) in order to precisely control device temperature and thus device wavelength compared to commercially available discrete technology. Data traffic is projected to increase sharply (40-80× by 2020) and this is driving an increase in network complexity and the requirement for scalable optoelectronic integration. A major bottleneck to this large scale integration is thermal management. Active photonic devices generate extremely high heat flux levels (~1 kW/cm2) that must be efficiently removed to maintain performance and reliability; furthermore, active photonic devices must be controlled at temperature precision better than ±0.1°C. Today’s thermal technology is at the limit and cannot scale with growth in the network. As a comparison, electronics produce lower heat flux levels (~100 W/cm2) and have a less restrictive temperature requirement of ≤ 85±2°C.Integration of thermal management onto optoelectronic devices has not been addressed to date in academic or industrial investigations and therefore presents a significant knowledge gap that must be filled to enable impact and ensure the EU is at the forefront of optoelectronic technology. While the end goal is driven by telecom or datacom industrial requirements there are many scientific knowledge gaps that will be filled by the TIPS consortium. The application space for a thermally-integrated smart optoelectronic solution is large and spans multiple communication length scales from long reach to inter/intra-chip communications as well as other applications like sensors that seek to leverage silicon photonics platforms.

Work performed from the beginning of the project to the end of the period covered by the report and main results achieved so far

WP2: A process flow to fabricate µTECs, using (a) a mask aligner approach combined with flip-chip bonding, and (b) a laser lithography template method, was developed. Materials with optimized thermoelectric properties with smooth and compact films were synthesized.
WP3: To date, the WP has: (i) commissioned a thermo-fluidic flow facility for characterising the flow components; (ii) designed and fabricated a set of micro Channel arrays for thermo-fluidic characterisation; and (iii) demonstrated two novel micro Pumps.
WP4: The objective of this work package is to design, fabricate and characterize a localized temperature-managed PIC, including integrated μTEC and thermally insulated heaters.
WP5: In this work period, WP5 has covered (i) the design, assembly and characterisation of the photonic packaging for current state-of-the-art PICs, which are to act as a benchmark for the advanced PICs in TIPS that include heterogeneously integrated μTECs and μFluidics, and (ii) the simulation and design of high-speed PCB and ceramic-interposers needed to deliver and receive the multiple (4, 8, 16) 25Gbps electrical channels to and from these advanced PICs.
In parallel, the Packaging Group at Tyndall have started to investigate the feasibility of an “all PCB” PCB approach for the RF-coupling in the TIPS project, which could significantly reduce the cost of packaging PICs with multiple 25Gbps channels.

Progress beyond the state of the art and expected potential impact (including the socio-economic impact and the wider societal implications of the project so far)

We live in a rapidly changing world where advances in consumer technology are occurring so fast that the telecommunications/data communications network is struggling to keep pace. The rapid uptake of smartphones/tablets and the widespread wireless streaming of high definition video and games are putting the current network architecture under immense strain, and the problem is compounded as more applications come online. Growth rates for data transmission vary across the network depending on the source. However, it is widely accepted that yearly performance improvements in products placed within the network lag considerably behind insatiable consumer demand.
To keep pace with these rapid changes, equipment manufacturers need to innovate at speed, at scale, and at low cost. This means that device and component integration is critical to enable the next many generations of efficient and scalable telecommunications products. The level of integration required has severe implications for hardware design in general but even more considerable challenges from a thermal perspective. The thermal challenge grows with ever- increasing levels of integration, as the designer struggles to build more functionality into shrinking package space. Packing so much functionality (e.g., devices and components) into smaller package footprints will lead to substantially increased thermal densities which in turn will require deployment of new thermal solutions.
TIPS is meeting this challenge by taking optoelectronic system thermal management beyond the state-of-the-art by developing technologies that will allow system designers to develop highly integrated 3D optoelectronic systems based on silicon.

Socio-economic impact:
Integrating photonic and electronic circuits in a single chip is a big challenge and it will reduce the cost, space and power consumption. The thermal issues have been addressed in the realm of TIPS, which will lead to a major technological development in handling internet data traffic expected to increase sharply (40-80x by 2020).
The research and development carried out in TIPS overall goal of creating energy-efficient Photonics Integrated Circuit (PIC) devices, which will enable high-speed data transmission with lower environmental impact. Specifically, the greatly enhanced thermal performance of μTEC and μFluidic cooling (in comparison with conventional thermal management) will underpin higher density, lower cost PIC devices. The expected result of this work is a significant reduction in the electrical power consumed by a PIC package in performing its function, lowering environmental impact or increasing performance per unit cost. When demonstrated, this integration technology can be applied not only for photonic circuits (PICs), but also for the whole electronic industry, where the local thermal management is needed. The impact will thus hit beyond the sole photonic circuits market.

Wider Societal implication:
Higher performance, energy-efficient PICs will enable widespread, cost-effective roll-out (or upgrading) of higher speed communications infrastructure, with associated societal and economic benefits. Localized thermal management should result in lower power consumption (since the thermal resistance from the heat source to the heat sink will be reduced), in higher device density on the circuits, and in further miniaturization of the photonic and electronic devices. A significant reduction in power consumption in a widely used photonic device will lead to a reduction in the running costs for data/telecom systems using these devices. Reduced power consumption lowers the environmental impact of these data/telecom systems or allows more performance for a given cost. Enhanced broadband speed and quality will eventually lead to several new services such as e-health (real-time doctor-to-patient communication), e-learning (remote access to live lectures and self-paced tuition) and far better online delivery of products thereby significant cost saving and customer satisfaction.

Related information

Record Number: 196361 / Last updated on: 2017-03-29
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