Community Research and Development Information Service - CORDIS

Silicon Nanocrystal Memory cell

In order to overcome limitations of conventional non-volatile and dynamic memory devices, it has been recently proposed to use nanocrystals as charge storage elements embedded in the gate oxide of a field-effect transistor (FET) and located in close proximity (2-3 nm) to the transistor channel.
The use of ion implantation for the fabrication of nanocrystal floating gates is very promising because of its well-established manufacturing advantages but faces the major issue of making nanocrystals close to the channel without compromising the integrity of the gate oxide. For this purpose, very-low energy ion implantation is particularly attractive. It has been demonstrated that this technique can lead, upon proper 1 keV implantation and annealing, to the formation of 2-D arrays of Si nanocrystals located at a tunneling distance from the SiO2/Si interface.
To explore the benefits of this technique for memory applications, Si-nanocrystal floating-gate MOSFETs have been fabricated and electrically characterized at room temperature. Memory devices with the following characteristics have been successfully achieved: (a) write and erase speeds close to those of conventional DRAM, (b) no degradation after 1010 write/erase cycles. The nanocrystal-based memory devices demonstrated are promising candidates for dynamic memory applications and suitable for mass fabrication, as a CMOS-fully-compatible process is used.

Reported by

THE CHANCELLOR, MASTERS AND SCHOLARS OF THE UNIVERSITY OF CAMBRIDGE
Trinity Lane, The Old Schools,
CB2 1TN CAMBRIDGE
United Kingdom
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