Wspólnotowy Serwis Informacyjny Badan i Rozwoju - CORDIS


EURONIM Streszczenie raportu

Project ID: G5RD-CT-2001-00470
Źródło dofinansowania: FP5-GROWTH
Kraj: France

StepSiC: Optimised SiC surface preparation procedure

Building on previous experience and know-how (in particular from EU JESICA), and other parallel efforts, NOVASiC succeeded in developing a reproducible SiC surface, yielding state-of-the-art epitaxial and device results. The StepSiC process provides atomic steps on on-axis SiC substrates. The StepSiC surface is also characterised by no scratches, low roughness, no damaged layer, low contamination. The benefit of this improved surface preparation on GaN growth was demonstrated by several partners and other SiC users worldwide.

A process for large volulme reclaim of SiC wafers is also operational, allowing scare material to be more available, and reducing dramatically material costs for the program.

As a result, NOVASiC is a steadily growing industrial and commercial operation, serving laboratories and industrial manufacturers around the world.


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