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Usable Vacuum Ultra Violet Lithography

Deliverables

The majority of chip manufacturing companies and resist vendors started research in the field of 157nm photoresists in 1999 and declared this to be the main lithography technology for the 65nm node. Due to the lack of transparency of the current 248nm and 193nm polymer generations at 157nm new polymer platforms had to be developed in order to follow the requirements of the Semiconductor Industry Association’s Technology Roadmap (ITRS). Common single layer resists (SLR) require maximum absorbances below 1/micron in order to generate relatively thick (>150nm) and etch resistant films to be used in 157nm lithography. For this, much effort was spent to synthesize new fluoropolymers with enhanced transmission. The CARL-principle (Chemical Amplification of Resist Lines) enables reduced film thicknesses by means of a bilayer approach and offers the advantages of biasing trenches and holes in an additional wet chemical biasing step. Thus, smaller critical dimensions (CDs), i.e. widened lines as well as shrinked contact holes with reduced line edge roughness (LER) can be generated if cross linking silylating agents are covalently incorporated into the reactive polymer films after the wet development. Simultaneously, an increase of film thickness can be generated by this method enhancing the etch resistance of the generated profiles. Unfortunately the previous polymers designed for 248nm or 193nm lithography for the CARL process show absorbances at 157nm that are too high (8.5/micron), even when used for TFI processes. During the phase 1 of the UV2Litho project, Infineon started model polymer screening and developed several new synthetic approaches towards more transparent CARL model polymers by the use of fluorinated comonomers. A novel polymer platform has been synthesized by means of radical copolymerisation, comprising a 157nm absorbance of 3.3/mircon. CARL Wet Silylation Experiments Feasibility tests have been carried out by measuring vertical film thickness increase of non-patterned resist layers. Almost 50nm (ca. 50%) increase could be found only after 15 seconds. Further experiments are needed on structured wafers to optimise the lateral pattern shrink. Exposure Results: Only a small number of exposure experiments have been performed with the new polymer platform due to limited access to early 157nm exposure tools. Resolution of a resist formulated from CG1 is limited by adhesion problems of the polymer on bare Silicon. As the 157nm Microstepper at International SEMATECH is a non-clustered tool, a large amount of quencher had to be used in order to prevent from T-topping caused by airborne contamination. Adhesion of the polymer can be improved by the use of antireflective coatings (ARC). Several 193nm exposures have been performed on the AT/1100 at IMEC. A maximum resolution of 90nm dense Lines/Spaces could be obtained. All exposures were done with a binary reticle. The current 157nm resist had to be adjusted to 193nm with regard to sensitivity and film thickness. Still, contamination and line edge roughness (LER) remain an issue. Process Development: Since no usable 157nm exposure capability for process development had been available, CARL process optimisation was carried out on standard DUV (non-fluorinated) polymer platforms with a high technological maturity. Prior to investigations of gate patterns, the work was focused on shrinking contact holes, the greatest challenge of future litho nodes. The key steps of the CARL shrink concept are described here: The thin top resist layer of the bilayer resists system is exposed and developed, followed by a wet silylation process at room temperature resulting in a typical pattern shrink (so called “chemical biasing”). The generated structures are transferred via oxygen reactive ion etch (RIE) into the bottom resist, serving as etch mask. A lateral bias of 50nm could be achieved from shrinking 200nm CH patterns via the CARL process at the 193nm node. Special attention was spent on shrink investigations of unsymmetrical patterns such as T-shape or L-bar structures as well as rectangular contacts. When using half tone phase shifting masks (HTPSM), side lobe printing, especially at defocus, becomes an issue. Side lobe defects after development may be cured (“healing”) during the silylation process. Depending very much on silylation conditions and the photoresist chemistry those defects can also result in severe bridging defects, so called “peanutting” originating from the swelling of the polymer matrix during the silylation reaction. This would require very sensitive balancing of all process and materials parameters and possibly would become another road blocker at future litho nodes, which would have to be thoroughly investigated. Due to the high chemical complexity and the outlined process limits of the CARL shrink technology Infineon decided not to use the process for DRAM manufacturing. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
The Diffused Aerial Image Model (DAIM) is a so-called simplified resist model. It provides a reliable way to simulate resist CDs for 1D or 2D features using a reduced number of model parameters. The basic principle relies on two main assumptions. First, the photogenerated product distribution is at first order obtained by a simple convolution of the aerial image by a gaussian function, which is accounting for the resist diffusion. Second, the threshold at which the CD is measured is related to the inverse of the experimental dose using a set of 3 parameters that are calibrated for given process conditions. These 3 parameters are related to the resist sensitivity and a potential dose offset. The model has been proved to provide accurate results (<5% error) for a wide range of wavelength, illumination conditions and feature types. Dissemination: two publications at the SPIE Microlithography conference in 2002 and 2003. Use potential: the model can be used as an additional resist model in a commercial (or non-commercial) lithography simulator. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
The Acceptance Test Procedure (ATP) document for the AT:1600 is a list of tests and specifications that the scanner has to meet during qualification in order to be accepted by the customer. The current ATP document is the result of a number of discussion rounds between ASML and the users involved in the project. The goal of these discussions was to define an ATP document that meets the user requirements. In other words, the ATP should ensure that if an AT:1600 scanner meets the specifications described in the ATP, it can be used by the users in their production environment. The resulting ATP document has tighter specifications than initially foreseen and was also made to be more inline with the ATP documents of other, more recent ASML scanners. Final agreement about the ATP content was reached between ASML and the users during a conference call in November 2003. Although there were still some comments on a couple of specific items in the ATP document, the users agree in general with the content of the modified ATP document. Following comments were made: - A specification on MSD Z should be added to the ATP; - Image distortion matching between different illumination settings is desirable; - A CH test should be included in the FAT; - Image distortion should also be tested with a hard pellicle mounted to the reticle; - A test for 50 nm IL with alt PSM/AF should also be included in the FAT. One general comment that was made was that for each section of the ATP a second illumination setting at which to conduct the test is desirable but which specific second illumination setting to use will be depend on the customer. These comments will be added into a customer specific request section of the FAT. ATP and comments have been put together and written down as a deliverable. Use: A significant part of the specifications in the AT:1600 ATP are usable for ArF technology at the 65 nm node or immersion ArF technology at the 55..40nm node. This is true because many of the specifications are not so much related to the wavelength, which has been used but are more related to the lithographic resolution for which the technology has been developed. As a result the economic exploitation of the results still will happen although not at the wavelength which was originally anticipated. Since ArF dry technology will be used to support the 65 nm node and ArF, immersion technology is expected to be used for the 55 - 40nm technology, 157nm technology would only be viable in combination with immersion for the 32 nm node. To explore this technology at the 32 nm node a lot of additional work has to be done which is outside the scope of the UV2Litho project. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
Our goal is to investigate the capability and limitations of existing metrology techniques towards 157 nm and to suggest alternatives when needed. ST Crolles has been especially active in the evaluation of a new metrology technique that was proposed by suppliers during the period covered by the project. This new technique, called scatterometry, is supposed to enhance process control in microelectronics fabrication. This alternative solution was assessed during the project for linewidth or Critical Dimension (CD) control at 65nm node, with particular care to 5 issues: - Timing and availability of suitable tools; - Ultimate resolution; - Accuracy and statistical precision; - Interaction with materials; - Universality. The Scatterometry technique needs to be fully assessed before being introduced in a productive environment. Moreover, integrated metrology tools become available with a very good level of confidence, using scatterometry technique. For 157nm lithography, integrated scatterometry metrology was considered as an interesting and valuable solution. This solution was considered in the final assessment and recommendations for metrology. Scatterometry is based on existing optical hardware tools, as spectroscopic ellipsometry for example. The method uses a specific pattern present on the wafer to be controlled, which is a 50 microns diffraction grating. The scatterometry tool measures the reflected light from this grating. The recorded data is then analysed with a software tool, based on the inverse resolution of light propagation. A complex software is developed and associated to the optical hardware tool, including a precise optical simulation tool and an efficient multi-parameter regression. Due to the heavy computation that are needed, real time operation is not possible at early phase. A library of possible solutions is simulated and the regression tool find out the best fit by scanning this pre-computed library. The work towards scatterometry assessment has been done in several steps: information and review of announced performances; demonstration by several suppliers; on-site evaluation and application development; integration of the tool in production line. 1) Suppliers have disclosed a lot of encouraging information on scatteromettry performances and perspectives even beyond 65nm node. 2) Demonstration has been carried out on six different solutions. Wafers were prepared using e-beam tool or 193nm lithography scanners. High performances were generally obtained on current and advanced technologies (130nm-65nm node). 3) A spectroscopic ellipsometer tool was installed to provide scatterometry measurement. The hardware was upgraded and a library generation tool was set up. Different lots were tracked and checked. Experiments were carried out so as to verify technical capability of the tool on specific targets: - Functionality tests and tool integration; - Standard applications on critical layers (R&D); - Advanced applications, i.e. line profile control, litho tools qualification. Correlation with CD-SEM and cross-section SEM were performed. The values obtained with scatterometry present a constant offset with respect to CD-SEM standard measurement. Results are in general well correlated with cross section SEM pictures, with a much lower shift. Tool to tool matching has also been checked. Measurement reliability is reported below: - Repeatability < 0.2nm; - Reproducibility < 0.4nm. 4) Integration activity consists in 65 nm node related work, mainly tools follow-up and validation for volume litho production. The scatterometry tool has been used to help process follow-up with very fast and efficient result. Tool qualification is also a very efficient application. Litho tool suppliers are also developing scatterometry-based qualification procedures for acceptance tests. To garanty robustness of scatterometry tool, the impact of different defects has been evaluated. For example: defects in the scatteromettry target after lithography (like scratch defect, missing lines, pattern collapse or bridged lines), target size limitation towards future available area on the wafer and alignment on the scatterometry target. The results obtained do not show any show-stopper towards fab integration. According to fab quality criteria, results were very good after lithography and after etch. Conclusion: Although some upgrades are needed, the CD-SEM is considered to be the primary tool class for the 157nm lithography. Several factors contribute to this evaluation: great expertise worldwide, good reliability and easy integration in production. But scatterometry is confirmed to be a very attractive technique, especially efficient for various applications in microelectronics fab and in supplier tool manufacture. Scatterometry tools are now operated in fabs, with high precision and fast throughput. Productivity gain have been showed. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
Through the UV2Litho project, our knowledge and expertise in addressing process extensions through improving chemical contrast in photo resist, rather than optical contrast obtained by optical extension techniques, was significantly broadened. The results have enabled Philips to exploit this knowledge for gate patterning at dimensions far beyond previously envisioned, applying larger wavelengths. This advantage was mainly achieved by a smart tuning of acid dose contrast through the optimisation of acid and quencher interactions in photo resist. Furthermore, process enhancements gained with developer tuning was demonstrated to enable further extension of optical lithography (193nm, and for that matter 157nm), thereby providing early and cost effective solutions for the (sub-) 65m technology node. Results and models behind the optimisation were presented at an early stage in the UV2Litho project, followed by publication in lithography related conferences. Also, the "tricks" on overbake integration for enhancing small poly gate printability was shared in great detail with IMEC to broaden their gate patterning capabilities. The benefits of these techniques are often of temporary nature. Once new and improved high resolution exposure tools become available for manufacturing, the manufacturing floor will standardise the process and minimize process times as much as possible for cost reasons. However, in the R&D stage of a new technology where these tools simply are not available, process extensions have proven to be a very valuable tool in creating next-generation dimensions with good printability, at the expensive of alternative developer conditions and/or bake durations. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
One of the important elements for imaging (sub-) 65nm dimensions involves diffusion of photo-generated acid in photo resists. Acid diffusion leads to blurring of the optical contrast, thereby affecting resolution capability, as well as photo speed (= dose) and line edge roughness (LER). A previously developed methodology for lens characterisation was utilised, after some modifications, to determine this image blur. This allowed a good indication of the magnitude of acid diffusion lengths. The method has been applied to various resist platforms, including 157nm photo resists, indicating that diffusion lengths in state-of-the-art 157nm resists are currently too large for imaging at the 65nm node. Although the application for the acid diffusion measurement methodology has proven a valuable tool for 157nm resist status assessment, with the move away from 157nm technology it becomes unlikely that this approach will prove its value in this field. However, it has been demonstrated that the methodology is applicable also towards 193nm (immersion) resists as well as a valuable tool in the assessment of next generation Extreme Ultra-Violet Lithography (13.5nm) resists. Hence the benefits of the acid diffusion methodology development, partly developed through the UV2Litho project, will continue to prove its value and benefits in the coming years. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
Technical and Market Requirements: Due to the rapid development of 193nm immersion lithography, the use of 157nm technology to realize sub-70nm groundrules is highly unlikely. A critical point had been that the insertion point of 157 nm lithography, or alternately 193 nm immersion, had continuously being shifted, as performance of 193 nm exposure tools and process technology has successfully being improved, so that from today’s perspective the use of 193nm technology appears to be viable in manufacturing even at sub-60nm groundrules. This development has initially forced a delay of a potential 157nm insertion and also required 157nm technology to be used at smaller groundrules, namely at a sub-60nm node, thus pushing for more stringent requirements for components of this technology. This has opened the window for the development of an alternate, competing technology and considerable effort has been spent on checking feasibility of this alternate technology. This move has been diluting the effort especially within the 157 nm infrastructure industry. This effect has initially severely threatened any continuation of 157 nm development and has finally literally killed the 157 nm development efforts. In conclusion, one can state that even if a user company would intend to introduce 157nm technology in the time frame 2006-2007, the success of this effort would severely be threatened by the lack of sufficient infrastructure comprising production worthy mask materials, mask process, mask making- and inspection equipment, hard pellicle materials and process, mature resist materials and process and last but not least exposure tools in volume numbers. Exploitation of Results: If the current trend of the entire industry to move along the immersion technology path is being continued, the introduction of 157nm lithography in its current form seems to be highly unlikely. In this case a number of the results of the FLUOR/UV2Litho project will not be exploited at user sites in the near future. Since, however, the ultimate resolution capability of 193nm immersion lithography is currently not assessable (implying production worthiness of that technology), there might be a window for introduction of 157nm technology in an immersion form around 2008-2010. However, it should be noted that the likelyhood for this to occur remains very small. Development work for this technology would be entirely based on results of the current project. Since the feasibility of 193nm immersion technology still needs to be proven and conclusive results are not expected before mid of 2005, 157nm lithography is currently ranked as being a backup technology in case immersion fails, as is reflected in the current ITRS roadmap. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
The objective of Infineon’s work on 157nm Single Layer Resist Development within UV2Litho was to provide a resist material for a sub 60nm DRAM ground rule, tested on the AT:1600. This material finally should have been commercially available and production worthy in terms of parameters that are not related to the imaging capabilities of the used exposure tool. In order to speed up resist development for 157nm, Infineon started a joined development project with a commercial resist supplier (Clariant Corporation). This very close scientifically based collaboration opened a unique chance to actively steer and speed up the project development in order to provide a functioning resist on time. Clariant acted as a subcontractor within the German funded BMBF. Due to the decreasing interest in worldwide industry towards 157nm Lithography and the move towards 193nm Immersion Lithography instead, the prototype resist constituted Infineon’s final activity within UV2Litho concerning resist activities. As part of a new generation of more transparent 157 nm resist platforms, a series of novel resists have been developed that have higher transparency and contrast. Using a new protecting group strategy, encouraging results have been obtained with fluorinated resin platforms based on norbornenes and cycloolefines These new resist systems show absorbance values as low as 1/µm at 157nm, have improved contrast, and have neither significant dark erosion nor do they switch to negative tone behaviour within the dose range studied. It has been shown that the BOCME group has a combination of properties that make it well-suited as a protective group for fluoroalcohol moieties. Two types of BOCME substituted materials were described, BOCME-F1 and BOCME-TFR, both of which are accessible through direct polymerisation and polymer modification. The BOCME-TFR polymers were found to give very transparent resins, which upon formation with a PAG could give resins with absorbances as low as 1.07micron at 157nm. Both the BOCME-F1 and the BOCME-TFR platforms were able to resolve small features upon exposure with 157nm light. The BOCME-TFR resin with low nominal protection was able to achieve resolution of 70nm for 1:1 and 50nm 1:1.5 L/S features at a dose of 91mJ/cm² (NA 0.85, Alt. PSM, low sigma). By lowering the amount of base it is possible to increase lithographic sensitivity up to 8-9 mJ/cm². This is done at the cost of feature profiles and top rounding, but intermediate levels of base are expected to yield materials having a good compromise between the two. Indeed a PED latitude of at least 20min in an FSI track can be easily achieved. Resist systems based upon BOCME-TFR have good PED latitude and excellent PEB temperature latitude and give good performance on either an organic BARC or SiON. Using the high NA exposure capability (0.9 NA) in highly pure and stable cleanroom atmosphere, features as small as 55nm lines and spaces were resolved for dense line patterns using advanced resist formulations. Blends of BOCME-F1 and BOCME-TFR give resins that have an intermediate absorption between the two types of resins. Using this blend approach, it was possible to resolve relaxed pitches down to 60nm L/S. For oxide etch conditions, such blends can give improved plasma etch resistance, but it was found that the BOCME-TFR platform by itself is sufficiently etch resistant to give selectivity only slightly inferior to that of the 248nm resist Deep UV RESIST. For chlorine etches, the selectivity of the BOCME-TFR was unexpectedly found to exceed that of the Deep UV RESIST standard. Last not least, hardmask etch capabilities have been proven for L/S patterns with relaxed CD and pitch. Due to the high and varying airborne contamination level at the different exposure sites, it is difficult to define one single layer resist prototype for all tools. To our knowledge, the AZ® EXP FX 2000P formulation behaves best under the cleanroom conditions at INVENT in Albany. With respect to the declining interest in 157nm lithography and the early project closure, a further optimisation of this prototype has not been carried out. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
A resist benchmarking procedure as well as a resist specification list have been defined within the UV2Litho consortium and this procedure was lined up with other consortia. This benchmarking procedure uses different masks (BIM, 6%attenuated PSM and alternating PSM) and illumination conditions and includes the following topics: resolution, profiles, process windows, linearity, substrate compatibility, pitch linearity, bright field versus dark field imaging, CD SEM shrinkage, Line-edge-roughness, delay stability, PEB sensitivity, etch resistance. The procedure has been applied to benchmarking of 157nm resists at first on micro-steppers (at Selete, ISMT) and in a 2nd phase of the project on the ASML MSVII full field scanner. The goal of the resist benchmarking was to accelerate the resist development and to identify resist processes for exposure tool qualification (ASML MSVII at IMEC at first and for the ASML AT1600 under development) and for integration for the 65nm node. Partners potentially benefiting from these results are the semiconductor manufacturers who want to implement 157nm resists in production, resist suppliers and tool suppliers. All benchmarking results have been communicated to the partners in the UV2Litho process. Continuous feedback has been given to the resist suppliers (non-project partners) on the performance of their materials in order to allow them to adapt the formulations according to the industrial specifications and available tools. Current status of the resist benchmarking: A large number resist materials have been screened and benchmarked according to the defined procedure. This has allowed a continuous assessment of the performance of 157nm resist throughout the project. Steady improvement in imaging performance of fluorinated resists has been observed. Imaging performance of current 157nm resist satisfies the resolution requirements for the 65nm node when using higher (0.85) NA scanners. However, still significant improvements are required towards the 32nm node for which 157nm immersion lithography is a possible candidate. Besides imaging performance, improvements in resist contrast, Line-edge-roughness, etch resistance, delay stability and photospeed are necessary. The feasibility of a gate patterning process (litho and etch) using these 157nm resist in combination with a hard mask has been demonstrated. As 157nm lithography is not going to be implemented for the 65nm node, the current available benchmarking results will not have an immediate application. However, the benchmarking methodology can easily be adapted to be applied for evaluation of resists for 193nm (immersion) or EUV lithography. If, the interest in 157nm (immersion) lithography would revive after 193nm immersion, the current resist results can be used as a guideline for resist development and optimisation towards the 32nm node. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
The main agreed goals of the metrology package could be summarised as follows: - Feed the whole project with the correct metrological techniques and tools; - Minimize the reduction of the global process window due to metrological uncertainty. Both topics were successfully covered, and relevant results made available to all the partners on time. In particular, as far as the former goal is considered, four techniques were selected and evaluated extensively throughout the project: CD-SEM, CD-Scatterometry, CD-AFM and "Combo" approaches, i.e. the combination of either technique in a single platform. All the techniques were evaluated according to five characteristics: timing (i.e. on-time availability), ultimate resolution, precision, severity of the interaction with measured structured and "universality". The selected benchmark for resolution and precision was the ITRS roadmap (for 65nm node) in its last released edition. Our analysis brought to the conclusion that: - CD-SEM, though several improvements are required to match all the requested quality figures, have to be looked at the main tool class for 65nm node; - CD-scatterometry offers a good and viable secondary solution, mainly due to the lack of universality; - CD-AFM and "combo" approaches might be used for "niche" applications, especially when very local information are looked for. Within each class, one or more tool models were evaluated and their performance compared to the benchmark, in order for the partners to be aware of the best metrology solution on the market during the whole project timeframe. Today, neither of them fulfils the requirements for the 65nm node, due to the large tool-to-tool matching component. Nevertheless, considering that in early development phase only a very few wafers have to be measured at ultimate resolution and precision, a single tool strategy for ultra-critical measurements may be applied. This being the case, commercial tools close to the requested performance are available today. Looking at the latter goal, main part of the work was dedicated to find innovative procedures for the newest considered technologies (scatterometry and "combo", with particular care to FIB+SEM combination) aiming to the optimisation of tool and recipe setups for a fast implementation into a productive environment. Proper experiments were ideated to strengthen the identified weak points of the considered techniques. Whenever any solution to a particular aspect was not available on time, a clear path towards requested minimal characteristics was given. For the technique (and tool) benchmark pointed out that the most critical aspect related to metrological quality (i.e. the largest component of the precision budget) is the tool-to-tool matching, procedures to reduce this contribution were studied and validated by a thoroughly exercise, carried on using tools owned by different project partners. The study demonstrated that applying the suggested procedure, the contribution could be limited about to the same value of the poorer single tool precision from a value equal to about three times that value. Further improvements are limited by the fact that it is statistically not significant to reach better overall results than those coming form a single tool, unless a larger data collection, not realistic in an early development phase, is available. Some hints were also given about the feasibility of matching tools belonging to different techniques ("combo" FIB+SEM versus CD-AFM and scatterometry versus CD-SEM). Results coming from the technique and tool benchmark are immediately usable by everyone, helping in taking decisions about the proper metrology tool selection for the 65nm node and avoiding to some extent the usual evaluations each partner is used to carry on before equipment purchase. Metrology procedures described in this summary a few lines above are immediately usable in principle by all the factories. They may require a few changes for a proper optimisation on a generic model. The suggested procedure for tool-to-tool matching, instead, is quite general and even exploitable to other kinds of measurements in semiconductor industry, e.g. the evaluation of thin layer thickness. The greatest part of the conclusions are valid also if the process choice for the 65nm node is other than an exposure wavelength of 157nm (with the exception of the interaction studies between the probe and the measured target, which of course are typical of the adopted materials), and therefore shall not be repeated in the case the lithography preferred solution is different (as it seems to be today). All the results were shared with project partners and exploited through two deliverables, which report all relevant data and conclusions. Raw data coming from tool benchmark and related analyses are available as well. Less sensitive material is also subject of a few papers or presentations, accepted at major lithography or metrology conferences. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
- The main result of the reticle printability work is that a proof-of-concept for VUV cleaning was reached. It is based on formerly published work of MIT Lincoln, ASML Wilton and TNO, and turned into a process usable at the wafer lithography environment. The installed methodology for VUV cleaning can be a base for further work that any partner may want to do in case of future application of 157nm exposure, because all the results were shared with the partners. The work and the understanding of airborne contamination is considered a good basis for similar studies in EUV, which will very likely be required. The main customers for this result are the semiconductor manufacturers using (or considering) an exposure wavelength of 157nm or below. In our work a not yet optimised, but stable methodology has been shown to re-establish the transmission of 157nm unpelliclized reticles to within 0.25% of the clean state. Reticles exposed to ambient air accumulate a film of contaminants that are mostly of hydrocarbon origin. Upon 157nm wavelength exposure even a monolayer of organic contaminants or water can lead up to 1-2% transmission loss in the modified fused silica mask substrate, leading to an exposure variation, which would consume a too large part of the CD control budget. Contamination of mask substrates appears to be a competitive adsorption phenomenon whereby low molecular weight species (with low adsorption energy) are replaced over time by large molecular weight ones (with high adsorption energy). The VUV cleaning procedure is based on an UVO RCS cleaner (obtained from ASML). The principle of this cleaner is based on reaction of the deposited hydrocarbons with oxygen radicals generated from by irradiation with 172nm light (xenon excimer lamp), both directly by dissociation of molecular oxygen and indirectly through the dissociation of ozone, which is unstable at this wavelength. Transmission measurements were done on a Sopra PUV SE5, although this tool is rather designed as an ellipsometer, and hence it is not a double beam system. With an optimized measurement procedure the repeatability of a single point on the reticle could be improved to typically within ±0.25%. The cleaning procedure was verified by lithographic imaging on the MS-VII. When using a reticle that had become contaminated over time by storage in cleanroom air, it could be shown that the transmission increased upon exposure to 157nm light of the laser and saturated around 1% higher after a dose equivalent to the exposure of eight 300mm wafers using a typical production type resist. In-situ cleaning during exposure in the MSVII was calculated to use a too large fraction of the CD budget across a minimum batch of 25 wafers. When pre-cleaning the reticle with the VUV process, the change in transmission caused by in-situ cleaning in the MSVII could be reduced to within 0.25%. The mask fabrication, transportation, handling and inspection appear to contribute to contamination of 157nm masks, but no irreversible effects have been observed. The impact of storage environment and storage duration on contamination of masks was also investigated. Limitations: The tools in use were not interfaced. Reticles that have received cleaning can get contaminated when they are unloaded from the PUV and loaded into a SMIF pod of the MSVII, before they are inserted into the MS-VII. This limitation is s estimated acceptable in view of the contamination rate found during the experiments, which were target towards a proof-of-concept. In a production environment corresponding tools would need to be integrated. - As two side results mask specs and printability are described herebelow. They are generically applicable to any exposure wavelength. These results are, apart from wafer fabs, also very relevant for mask shops, as they clarify the mask quality needs and improve the communication between these two parties. A list of evolutionary mask specs was composed, in which a certain ratio of the critical dimension is used to specify most of the quality parameters. Per CD and selected aggressiveness of the major quality parameters a so-called mask technology code is used. On reticle quality printability, a formerly published study of mask quality printability (tackling printability of linewidth control, corner rounding), was extended, now focusing on printability of edge slope of the 180deg areas in AAPSM: It is a known point of attention that AAPSM topography induces an image intensity imbalance between the light propagating through the zero and pi-shifted space. We correlated printability results directly to the mask quality through the use of rigorous electro-magnetic field simulations including 3D mask topography. The amount of undercut or bias and the quartz etch depth of the pi-shifted space on the mask could be estimated. A through-pitch assessment gives an indication of the quality of the etch process during mask making. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/
Outgassing has been found to be a very serious topic for current and upcoming lithography nodes such as 193nm and especially for 157nm. Since the photon energy at these wavelengths is high enough to cleave chemical bonds, photoresist materials generate volatile organic products under exposure conditions. These compounds can deposit on the surface of the front lens of the exposure tool, causing severe and irreversible lens damage especially under high volume productive conditions. Goal of this project was to develop and introduce a reliable and quick methodology for resist outgassing behaviour under exposure. This methodology and the regular resist benchmarking can be seen as two complementary methods for resist selection for the MSVII (and later on also planned for the AT1600). Two methodologies for outgassing detection have been developed and setup in the Infineon R&D cleanroom facilities in Erlangen. The studies in an early learning phase have been done with the “established” and in-house available 193nm wavelength and concentrated on the evaluation of the potential of the methodologies. The On-line MS methodology has been setup and tested with respect to detection capability, reproducibility, and quantification. Several resist model systems and competitive resists have been investigated with the technique. The typical and partially from literature known behaviour of the resist have been observed and the major part of the data has been assigned giving a rather high confidence in the detection capability. MS data are highly reproducible and quantification relative to a baseline resist is possible. Despite the fact that the technique employs vacuum conditions the received results are a good basis to identify possible contaminants outgassing from a resist at the target wavelength of 157nm. Its clear advantage is the speed of analysis of a resist sample. As second technique we developed and evaluated a proof plate methodology, a technique that is “closer” to the reality. It simulates an optical system and collects the total remaining outgassing residues on a transparent proof plate under atmospheric conditions. The residues are analysed after exposure with X-ray photoelectron spectroscopy (XPS). The PPM is the key to identify the outgassing elements and concentrates on the outgassing material, which remains in “the optical system”. On-line MS and PPM have to be seen in close conjunction and to further confirm outputs of each methodology. After assessment of the different methodologies, on-line mass spectroscopy was selected as standard technique due to its simplicity and reliability. It has been shown that with this special setup clear differences of the outgassing behaviour at 193nm could be seen. Since the lithography mainstream changed towards 193nm immersion over the last turn of the year it was necessary to adapt the planning and outgassing efforts to the new situation. As result we decided to skip the transfer of PPM to 157nm and concentrate only on On-line MS. Despite this reduction to one technique the results gave valuable input to the 157nm resist technology development. Several commercial resist samples from 4 resist vendors (AZ Electronic Materials, JSR Corporation, Rohm & Haas, and Tokyo Ohka Kogyo (TOK)) as well as in-house formulations and model compounds have been characterized first at 193nm and then at 157nm wavelength. The resists have been ranked with respect to the total observed outgassing. The samples have been treated in exactly the same way to make the mass spectroscopic data comparable. Several common but also different outgassing fragments and molecules have been observed and identified. Each sample has been characterized by its specific “fingerprint”. However, a real comparison was not possible due to intellectual property issues of the resist vendors. Therefore the total amount of outgassing has been used to compare the resist samples neglecting the chemical and physical properties of the outgassing material. As a major outcome, a sample that is representative for the single layer prototype resist (AZ® EXP FX 2000P) was identified as the resist with the lowest total amount of outgassing and therefore should be suitable for 157nm full field exposures. More information on the UV2LITHO project can be found at: http://www.imec.be/uv2litho/

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