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FP5

ATHIS Résumé de rapport

Project ID: G1RD-CT-2002-00729
Financé au titre de: FP5-GROWTH
Pays: United Kingdom

Development of tester / oven interface

Part of the overall project is to be able to test a range of macro blocks (sub-circuits) realised in SoI technology at temperatures around 250-300C. It is also necessary to perform, as far as possible, accelerated life testing on these circuits. This will require stimulating the circuits for approximately 1000 hours at elevated temperatures and voltage, the acquisition, logging and subsequent processing of test data.

It would not only be extremely costly but also impractical to try to interface a commercial logic/memory tester to the oven and run the system continuously for 1000hours. Consequently a scheme is being developed which embodies the Built Off -Chip Self Test (BOST) Voltage/Current test strategies to be used over a test source oven interface.

The test source/oven interface comprises a mix of software and hardware. The software aspects of the interface have been implemented in LabVIEW, which is a graphical programming language developed by National Instruments. “Virtual Instruments” (VIs) are created, which are customised programmable functions used to realise a range of instrumentation functions rather than employing dedicated hardware. This approach has the major advantage of flexibility and can accommodate changes in requirements with relative ease.

The modular structure of the scheme being developed permits the resulting system to be used as:
- A pattern generator creates the test stimuli for the circuit under test.
- A logic analyser compares actual and expected responses from the circuit under test.
- A combination of pattern generator and logic analyser emulates BOST.
- A data acquisition system storing and manipulating test results.

The hardware aspects of the interface comprise several PCBs (mother board and 3 daughter boards) and the “off-chip” current monitor.

Success Factors:
- Understanding of test methodologies will ultimately enhance reliability.
- Cost reduction in manufacture.
- Cost reduction in digital ATE and reliability test equipment

End Users:
- Designers for microelectronic systems to be used in HT applications in automotive, aerospace, oil exploration etc.
- Manufacturers of semiconductors for HT applications.

Informations connexes

Contact

Gordon RUSSELL, (Academic)
Tél.: +44-191-2227324
Fax: +44-191-2228180
E-mail