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FP5

ATHIS Résumé de rapport

Project ID: G1RD-CT-2002-00729
Financé au titre de: FP5-GROWTH
Pays: Germany

EEPROM circuits for high temperature applications

Within the ATHIS project EEPROM development has been started at X-FAB with support by IMMS. First it was checked whether the XI10 SOI technology is suitable for the development of EEPROM. This has been found to be so, as only few additional process steps are necessary.

The development was concentrated at the beginning on finding the optimum process modification and the most suitable EEPROM memory cell layout. For this a large number of different cells on wafers with process variations were realised and tested. Apart from the basic cell development, peripheral circuits for an EEPROM have been realised such as charge pumps, oscillators and HV switches.

A novel layout for the basic EEPROM cell has been developed. German and international patents for this cell are applied and pending. Data endurance and retention tests on a double EEPROM cell in the extended temperature range (up to 250C) were successful passed. Initial measurements on a 32x16bit EEPROM prototype show promising results.

Reported by

IMMS gGmbH
Konrad-Zuse-Str. 14
99099 Erfurt
Germany
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