Service Communautaire d'Information sur la Recherche et le Développement - CORDIS

FP5

ATHIS Résumé de rapport

Project ID: G1RD-CT-2002-00729
Financé au titre de: FP5-GROWTH
Pays: Italy

Digital design flow optimized for SOI devices

The design and high temperature (>200°C) digital device required a different approach.

The technology required is SOI (Silicon On Insulator) and the design flow must be aware of the extended temperature range.

The step that needs the most attention is the simulation: the models required for the low level components (FFs, gate, ram) have to be coherent with the behaviours at very high temperature (in "normal" designs, the worst case is the behaviour at temperature of 125°C as required by automotive specifications).

This difference in the simulation phase leads to a different solution to modify the design during the many design iterations.

This know-how will be useful to speed-up future digital design concerning high temperature designs.

Contact

Alberto MANZONE, (Head of Unit)
Tél.: +39-011-9083146
E-mail