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Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties

Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties

Objective

CONTREX (Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties)

Abstract – Up to now mission & safety critical services of Systems of Systems (SoS) have been running on dedicated and often custom designed Hardware/Software platforms. In the near future such systems will be accessible, connected with or executed on devices comprising off-the-shelf HW/SW components. Significant improvements have been achieved supporting the design of mixed-critical systems by developing predictable computing platforms and mechanisms for segregation between applications of different criticalities sharing computing resources. Such platforms enable techniques for the compositional certification of applications’ correctness, run-time properties and reliability.
CONTREX will complement these important activities with an analysis and segregation of the extra-functional properties real-time, power, temperature and reliability. These properties risk becoming major cost roadblocks when 1) scaling up the number of applications per platform and the number of cores per chip, 2) moving to battery powered devices or 3) switching to smaller technology nodes. CONTREX will enable energy efficient and cost aware design through analysis and optimisation of real-time capability, power, temperature and reliability with regard to application demands at different criticality levels. To reinforce European leadership and industrial competitiveness the CONTREX approach will be integrated into existing model-based design methods that can be customized for different application domains and target platforms.
CONTREX will focus on requirements derived from the automotive, aeronautics and telecommunications domain and evaluate effectiveness of its results and drive integration into existing standards for the design and certification based on three industrial demonstrators. Valuable feed-back to the industrial design practice, standards, and certification procedures is pursued.
Our economic goal is to improve energy efficiency by 20 % and to reduce cost per system by 30 % due to a more efficient use of the computing platform.

Coordinator

OFFIS EV

Address

Escherweg 2
26121 Oldenburg

Germany

Activity type

Higher or Secondary Education Establishments

EU Contribution

€ 912 847

Administrative Contact

Frank Oppenheimer (Dr.)

Participants (15)

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VODAFONE AUTOMOTIVE TELEMATICS SA

Switzerland

EU Contribution

€ 418 491

iXtronics GmbH

Germany

EU Contribution

€ 317 214

GMV AEROSPACE AND DEFENCE SA

Spain

EU Contribution

€ 131 162

UNIVERSIDAD DE CANTABRIA

Spain

EU Contribution

€ 391 336

DOCEA POWER

France

EU Contribution

€ 199 240

EUROPEAN ELECTRONIC CHIPS & SYSTEMS DESIGN INITIATIVE

France

EU Contribution

€ 81 079

INTEL CORPORATION SAS

France

EU Contribution

€ 93 720

POLITECNICO DI MILANO

Italy

EU Contribution

€ 708 514

STMICROELECTRONICS SRL

Italy

EU Contribution

€ 686 834

POLITECNICO DI TORINO

Italy

EU Contribution

€ 461 131

EDALab srl

Italy

EU Contribution

€ 241 520

TECHNOLABS srl

Italy

EU Contribution

€ 270 348

ST-POLITO Societa' consortile a r.l.

Italy

EU Contribution

€ 200 332

EUROTECH SPA

Italy

EU Contribution

€ 430 300

KUNGLIGA TEKNISKA HOEGSKOLAN

Sweden

EU Contribution

€ 505 932

Project information

Grant agreement ID: 611146

Status

Closed project

  • Start date

    1 October 2013

  • End date

    30 September 2016

Funded under:

FP7-ICT

  • Overall budget:

    € 9 341 564

  • EU contribution

    € 6 050 000

Coordinated by:

OFFIS EV

Germany