Periodic Reporting for period 1 - SelectX (Integrated Crossbar of Microelectromechanical Selectors and Non-Volatile Memory Devices for Neuromorphic Computing)
Reporting period: 2016-04-01 to 2018-03-31
Crossbars of memristors stacked on transistor chips (Fig 1a) could deliver the high density and connectivity required for hardware ANNs. However, the crossbar architecture has the sneak path problem: neighbouring devices create an electrical short around the selected device (Fig 1b). A solution is to use a non-linear selector for each of the memory devices, the most common selector being a transistor. The transistor is a three-terminal device fabricated in the Silicon bulk so it has limited scalability and stackability. Therefore its use as a selector negates the advantages offered by the two-terminal memristor.
This project proposed an alternative selector based on a two-terminal microelectromechanical switch (MEMS) (Fig. 2), thanks to its high nonlinearity.The goal was to develop a crossbar of memristors integrated with MEMS selectors. The success of this project is immediately relevant to hardware ANNs and non-volatile memories and to the industry players in the field (HP, IBM, etc.).
Substoichiometric titanium dioxide (TiO2-x) was the material of choice due to its good memristive properties. The initial plan was to deposit substoichiometric TiO2-x using reactive sputtering, but it was not successful due to experimental difficulties with the sputtering equipment owned by IMT Bucharest. An alternative method - evaporation from TiO2 pellets in vacuum - was pursued with success, using an e-beam deposition tool at IMT. The deposited material was sub-stoichiometric with high initial conductivity.
Based on the substoichiometric TiO2-x from WP1, memristors as small as 1.5 x 1.5µm^2 (Fig 3a) were fabricated in three photolithography steps using the cleanroom facilities at IMT Bucharest. The device programming was done using a Keithley parameter analyzer, by applying voltage to top electrode and grounding the bottom one. The memristor has low forming (<3V) and switching voltages (~-1.5V for reset and 1.2 - 2V for set) (Fig 3b) and behaves in a reliable digital fashion with an ON/OFF ratio ~ 1000.
WP3.Single MEMS selector
The MEMS selector is the novel concept proposed, so it was extensively investigated in COMSOL simulations and experimental fabrication. MEMS are typically large (~100µm) and have high actuation voltages (>50V), not desirable for a selector. Lee et al. (2013) showed a nanoelectromechanical switch with low actuation voltage (Vth<1V), but its pipe clip structure is prone to stiction. Our design has a metallic beam supported by pillars separated from a fixed bottom electrode by a small air gap. The switch is electrostatically actuated by applying a voltage between the beam line and the bottom electrode. Two beam geometries– solid vs. H-shaped- were simulated in COMSOL (Fig 4). The H-shaped one showed reduced actuation voltage, but slightly higher stress at the corners. For a memristor-compatible fabrication, metal pillars were first patterned to support the beam line. A bottom electrode was patterned in the gaps between the pillars, then the entire structure was covered with a sacrificial SiO2 layer for temporary support of the beam. To ensure that the beam is fabricated on a flat surface, chemical mechanical polishing was done at EPFL during three secondment trips (September 2016, March and September 2017). Devices with protrusions were fabricated to reduce the contact area. Lastly, the SiO2 was removed. The device was tested in series with an external 90MOhms resistor. The current – voltage characteristics (Fig 5) has a sharp transition at ~3V when the switch turns ON, then the series resistor limits the current in the 100nA range. When the voltage drops <1.5V the beam disconnects and the switch returns to OFF.
WP4.Integrated memristor/MEMS selector
The selector design from WP3 was modified to accommodate the memristor from WP2. After the bottom electrode fabrication, another additional e-beam lithography step is performed to deposit the active layer and top electrode of the memristor device. The integrated device then follows the same steps as the single NEMS selector: SiO2 deposition, planarization, beam patterning and release. The integrated memristor (Fig 6) showed improved non-linearity, but future work will focus on hermetic device encapsulation since the devices were affected by humidity and stiction.
WP5.Crossbar of integrated devices
The results from WP4 were expanded in WP5. With the help of two summer interns, a matrix of such integrated devices was simulated in COMSOL, then a prototype 5x5 crossbar of memristor/MEMS devices (Fig 7) was fabricated using the same basic device design proposed in WP4. This structure, although of modest size, is the first integrated crossbar of memristors and MEMS selectors. The success of this prototype enables much larger arrays that implement artificial neural circuits.
Summary of exploitation and dissemination
The Researcher presented work related to integrated memristor/MEMS components and heterogeneous 3D integration challenges and opportunities in six international events and at the Semiconductor Annual Conference (CAS) in Romania. The Researcher also gave an invited seminar at IBM Zurich Research Laboratory in September 2017 and an invited seminar at NIST Gaithersburg in March 2018. Two journal papers, thanking MSCA-IF funding, are in preparation and will be sent for review in the summer of 2018.
Given the SelectX results, the Researcher has identified two future projects related to radio frequency non-volatile switches and to artificial neuron implementations and is currently writing proposals based on these ideas.