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Ultra-Low PoweR technologIes and MEmory architectures for IoT

Ultra-Low PoweR technologIes and MEmory architectures for IoT

Objective

The goal of the PRIME project is to establish an open Ultra Low Power (ULP) Technology Platform containing all necessary design and architecture blocks and components which could enable the European industry to increase and strengthen their competitive and leading eco-system and benefit from market opportunities created by the Internet of Things (IoT) revolution.
Over 3 years the project will develop and demonstrate the key building blocks of IoT ULP systems driven by the applications in the medical, agricultural, domestics and security domains. This will include development of high performance, energy efficient and cost effective technology platform, flexible design ecosystem (including IP and design flow), changes in architectural and power management to reduced energy consumption, security blocks based on PUF and finally the System of Chip and System in Package memory banks and processing implementations for IoT sensor node systems.
Developped advanced as 22nm FDSOI low power technologies with logic, analog, RF and embedded new memory components (STT RAM and RRAM) together with innovative design and system architecture solutions will be used to build macros and demonstrate functionality and power reduction advantage of the new IoT device components.
The PRIME project will realize several demonstrators of IoT system building blocks to show the proposed low power wireless solutions, functionality and performance of delivered design and technology blocks.
The consortium semiconductor ecosystem (IDMs, design houses, R&D, tools & wafer suppliers, foundries, system/product providers) covers complementarily all desired areas of expertise to achieve the project goals.
The project will enable an increase in Europe’s innovation capability in the area of ULP Technology, design and applications, creation of a competitive European eco-system and help to identify market leadership opportunities in security, mobility, healthcare and smart cost competitive manufacturing.
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Coordinator

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM

Address

Kapeldreef 75
3001 Leuven

Belgium

Activity type

Higher or Secondary Education Establishments

EU Contribution

€ 3 116 585

Participants (16)

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GLOBALFOUNDRIES Dresden Module One LLC & Co. KG

Germany

EU Contribution

€ 2 936 049,75

FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.

Germany

EU Contribution

€ 1 013 123,50

STMICROELECTRONICS SA

France

EU Contribution

€ 320 795,94

STICHTING IMEC NEDERLAND

Netherlands

EU Contribution

€ 688 361

TECHNISCHE UNIVERSITAET DRESDEN

Germany

EU Contribution

€ 977 842

IDT EUROPE GMBH

Germany

EU Contribution

€ 560 248,13

CEZAMAT PW SPOLKA Z OGRANICZONA ODPOWIEDZIALNOSCIA

Poland

EU Contribution

€ 450 000

SURECORE LTD

United Kingdom

EU Contribution

€ 425 437,50

TECHNOLUTION BV

Netherlands

EU Contribution

€ 125 865

INTRINSIC ID B.V.

Netherlands

EU Contribution

€ 140 400

SOITEC SA

France

EU Contribution

€ 210 625

DREAM CHIP TECHNOLOGIES GMBH

Germany

EU Contribution

€ 335 625

Singulus Technologies AG

Germany

EU Contribution

€ 27 500

BUBBLES AND BEYOND GMBH

Germany

EU Contribution

€ 129 375

SYNOPSYS NETHERLANDS BV

Netherlands

EU Contribution

€ 379 609,38

STMICROELECTRONICS ROUSSET SAS

France

EU Contribution

€ 201 334,38

Project information

Grant agreement ID: 692519

Status

Ongoing project

  • Start date

    1 December 2015

  • End date

    30 September 2019

Funded under:

H2020-EU.2.1.1.7.

  • Overall budget:

    € 38 296 264

  • EU contribution

    € 12 038 776,58

Coordinated by:

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM

Belgium