CORDIS
EU research results

CORDIS

English EN

Architecting More Than Moore – Wireless Plasticity for Heterogeneous Massive Computer Architectures

Objective

The main design principles in computer architecture have shifted from a monolithic scaling-driven approach towards an emergence of heterogeneous architectures that tightly co-integrate multiple specialized computing and memory units. This is motivated by the urgent need of very high parallelism and by energy constraints. This heterogeneous hardware specialization requires interconnection mechanisms that integrate the architecture. State-of-the-art approaches are 3D stacking and 2.D architectures complemented with a Network-on-Chip (NoC) to interconnect the components. However, such interconnects are fundamentally monolithic and rigid, and are unable to provide the efficiency and architectural flexibility required by current and future key ICT applications. The main challenge is to introduce diversification and specialization in heterogeneous processor architectures while ensuring their generality and scalability.

In order to achieve this, the WiPLASH project aims to pioneer an on-chip wireless communication plane able to provide architectural plasticity, reconfigurability and adaptation to the application requirements with near-ASIC efficiency but without any loss of generality. For this, the WiPLASH consortium will provide solid experimental foundations of the key enablers of on-chip wireless communication at the functional unit level as well as their technological and architectural integration. The main goals are: (i) prototype a miniaturized and tunable graphene antenna in the terahertz band, (ii) co-integrate graphene RF components with submillimeter-wave transceivers and (iii) demonstrate low-power reconfigurable wireless chip-scale networks. The culminating goal is to demonstrate that the wireless plane offers the plasticity required by future computing platforms by improving at least one key application (mainly biologically-plausible deep learning architectures) by 10X in terms of execution speed and energy-delay product over a state-of-the-art baseline.

Coordinator

UNIVERSITAT POLITECNICA DE CATALUNYA

Address

Calle Jordi Girona 31
08034 Barcelona

Spain

Activity type

Higher or Secondary Education Establishments

EU Contribution

€ 351 375

Participants (6)

Sort alphabetically

Sort by EU Contribution

Expand all

IBM RESEARCH GMBH

Switzerland

EU Contribution

€ 507 450

ALMA MATER STUDIORUM - UNIVERSITA DI BOLOGNA

Italy

EU Contribution

€ 328 750

ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE

Switzerland

EU Contribution

€ 385 250

GESELLSCHAFT FUR ANGEWANDTE MIKRO UND OPTOELEKTRONIK MIT BESCHRANKTERHAFTUNG AMO GMBH

Germany

EU Contribution

€ 581 250

UNIVERSITAET SIEGEN

Germany

EU Contribution

€ 417 252,50

RHEINISCH-WESTFAELISCHE TECHNISCHE HOCHSCHULE AACHEN

Germany

EU Contribution

€ 423 437,50

Project information

Grant agreement ID: 863337

Status

Ongoing project

  • Start date

    1 October 2019

  • End date

    30 September 2022

Funded under:

H2020-EU.1.2.1.

  • Overall budget:

    € 2 994 765

  • EU contribution

    € 2 994 765

Coordinated by:

UNIVERSITAT POLITECNICA DE CATALUNYA

Spain