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Exploring the Frontiers of Magnetic Logic

Exploring the Frontiers of Magnetic Logic

Objective

The integration of computers into every day life requires smaller, more powerful but less power consuming processing units. According to the ITRS roadmap, devices based on Si only technology will face serious obstacles hindering downscaling and power reduction within a few years. Parallel data processing, faster interactions between logic functions and memories, and reconfigurable logic functions are needed in particular for applications that require image processing. In magnetic logic the direction of the magnetisation in sub-micron patterned Ferro magnets is identified with Boolean logic 1 or 0. The input changes the magnetisation of one structure and the output - i.e. the logic function - is then defined by the layout and the magnetisation states of the subsequent structures. As first demonstrated by the partners UDUR and UOB, Magnetic Logic promises low power non-volatile computing, "on the fly" reprogrammability, massively parallel character and ultrafast operation and thus has the potential to become a key technology for logic circuits. Magnetic Logic could also bring together real time reconfiguration and universal memory - key success factors compared to other semiconductor techniques for reconfigurable logic. This FET-OPEN STREPS project will integrate key European research groups hi the field hitherto unrelated to each other. Three approaches to Magnetic Logic will be compared to establish the proof of concept of this new technology, keeping Europe at the forefront of magnetic logic. The consortium comprises the two leading European laboratories UOB and UDUR, reinforced by groups bringing alternative approaches (CEA - Hall effect), experimental and theoretical techniques (TUKL and UPS) and an industrial partner (ST) with the capacity for developing the required architecture and advanced CMOS technology. The largest of the four work packages jointly explores and drives forward the frontiers of magnetic logic by establishing full Boolean families and interconnects. This basic research will be accompanied by efforts guaranteeing the integrability of Magnetic Logic into application devices, i.e. issues of scalability, compatibility with a Silicon environment and smart card applications. This will ensure a fast flow of the results obtained in this project into future industrial plans for products.

Coordinator

UNIVERSITAET BIELEFELD

Address

University Street 25
33501 Bielefeld

Germany

Administrative Contact

Guenter REISS (Professor)

Participants (5)

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COMMISSARIAT A L'ENERGIE ATOMIQUE

France

STMICROELECTRONICS SA

France

TECHNISCHE UNIVERSITAET KAISERSLAUTERN

Germany

UNIVERSITE PARIS XI

France

UNIVERSITY OF DURHAM

United Kingdom

Project information

Grant agreement ID: 510993

  • Start date

    5 October 2004

  • End date

    Not Available

Funded under:

FP6-IST

  • Overall budget:

    € 2 850 706

  • EU contribution

    € 1 904 653

Coordinated by:

UNIVERSITAET BIELEFELD

Germany