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Advanced gate stacks for CMOS technology

Objectif

We will explore advanced gate stacks for ultimate scaling of silicon based devices beyond the 45nm technology node. The firstobjective will be to find suitable metal oxide dielectric materials to replace the long standing silicon dioxide from the transisto rgate. The materials must have a dielectric constant higher than 30 and a high thermal stability in contact with silicon, in orderto obtain equivalent oxide thickness (EOT) 0.5nm or lower. The second objective will be to develop appropriate models for thea nalysis of the electrical data in order to extract accurate values of EOT, interface trap density, and flat band voltage shifts. Toachieve the objectives we have broken our workplan in four priorities which are: materials preparation; post-depositiontreatm ent; device fabrication and testing; data analysis. To implement the workplan we are going to exchange scientistsbetween the academic institution NCSR-'Demokritos' and the industrial organization Philips Research Leuven. Philips willlearn from "Demokritos" about non-traditional material preparation methodologies based on molecular beam epitaxy(deposition) and structural characterization of metal oxides and interfaces. On the other hand NCSR will learn from Philipsabout fabrication and electrical testing of high-k devices. The immense interest of the industry in exploring new materials andassociated equipment at a low cost without disrupting the main process flow, guarantees that this collaboration will developinto a lasting strategic partnership.

Appel à propositions

FP6-2002-MOBILITY-3
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Coordinateur

NATIONAL CENTER FOR SCIENTIFIC RESEARCH "DEMOKRITOS"
Contribution de l’UE
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Adresse
Patriarchou Gregoriou Str.
60228 AGHIA PARASKEVI
Grèce

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