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FINfet structures for FLASH devices

Objective

The FinFLASH project aims to study a new cell architecture to overcome the scaling limits of FLASH memories beyond the 28nm technology node (year 2015 and after). The new idea is to evaluate the potentialities of the FinFET, one of the non-classical advanced MOSFETs that provides a path to CMOS scaling to the end of the RoadMap, for FLASH memory application. Main challenge will be the optimisation of the device structural design to achieve NVM functionalities. Additionally, the introduction of new materials will enable new operating principles that may provide new behaviour and functionality beyond the constraints of classical FLASH memories.

The FinFLASH approach is promising both for stand-alone NVMs, due to the extremely compact memory cell size, and for the embedded ones, due to the intrinsic compatibility of the FinFLASH process with the one of FinFET logic devices.

The main objectives will be:
1) Study on the most promising charge storage media and device designs;
2) Evaluation based on single cells and arrays of FinFLASH devices;
3) Definition of program/erase schemes at ultra-short channel lengths;
4) Development of comprehensive and predictive models both at the device and circuit level;
5) Simulation and optimisation of FinFLASH devices using TCAD tools.

During the first year preliminary evaluations of multi-gate device structural design will be made by advanced 2D/3D TCAD simulations. At the same time, the development of the critical technological modules will be treated. Both deep UV and e-beam lithography will be adopted to realize devices, on Si-bulk and SOI, with minimum size of 25nm x 25nm.

A detailed electrical and microstructural evaluation of the devices will be performed. During the second year of the project, a second run of devices will be done, allowing for the evaluation of optimised FinFLASH cells and small arrays. The optimised structures will also include new materials for the gate stack like high-k dielectrics and metal gates.

Funding Scheme

STREP - Specific Targeted Research Project

Coordinator

CONSIGLIO NAZIONALE DELLE RICERCHE
Address
Piazzale Aldo Moro 7
Roma
Italy

Participants (6)

COMMISSARIAT A L'ENERGIE ATOMIQUE
France
Address
31-33 Rue De La Fédération
Paris Cedex 15
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Belgium
Address
Kapeldreef 75
3001 Leuven
SILVACO DATA SYSTEMS (EUROPE) LIMITED
United Kingdom
Address
Silvaco Technology Centre, Compass Point
PE27 5JL St. Ives
SILVACO DATA SYSTEMS SARL
France
Address
55 Rue Blaise Pascal, Immeuble Silvaco Zirst Ii
Mont Bonnot St. Martin
STMICROELECTRONICS S.R.L.
Italy
Address
Via C. Olivetti 2
Agrate Brianza (Milano)
UNIVERSITA DI PISA
Italy
Address
Lungarno Pacinotti 43/44
Pisa