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Multiview VLSI-Design System ICD

Obiettivo

The objective of project 991 was to develop a complete, integrated, open and cost-effective design system usable on a large variety of intelligent workstations. The system had to be capable of mastering the complexity of the design of large integrated circuits by exploiting their geometrical and functional hierarchies in a logical and intelligent environment and providing sophisticated synthesis and verification tools.
The main topics covered were functional data modelling, distributed data management, verification of submicron structures, advanced multilevel simulation, self-testing/fault-tolerant synthesis techniques, and the provision of tools for the verification ofmanufactured ICs. Finally, the project had the explicit goal of providing an open system geared to the needs of independent designers.
A complete system (computer and human resources) has been designed for the production of dedicated integrated circuits (IC) using full custom and semicustom technologies.

The objective was to develop a complete, integrated, open and cost effective design system usable on a large variety of intelligent workstations. The system had to be capable of mastering the complexity of the design of large integrated circuits by exploiting their geometrical and functional hierarchies in a logical and intelligent environment and providing sophisticated synthesis and verification tools. The main topics covered were functional data modelling, distributed data management, verification of submicron structures, advanced multilevel simulation, self testing/fault tolerant synthesis techniques, and the provision of tools for the verification of manufactured integrated circuits. Finally, the project had the explicit goal of providing an open system geared to the needs of independent designers. The system developed has 3 basic principles: Firstly, tools access streams of raw design data, such as a netlist, a layout, or a system diagram. They create data structures which match the specific operations to be performed on them. Hence a first major component of the design database is a collection of streams of data. Secondly, all design tools make use of the common repository of design data and meta data, thereby avoiding the needless conversion of various data types. All tools adopt a common design data transaction schema. Thirdly, the integrated circuit design (ICD) system is an open system: any tool from outside the project available in source code can easily be adapted to the ICD environment by modifying the source.
The system developed has three basic principles:
-Data, Meta-Data and Design Schema
Tools access streams of raw design data, such as a netlist, a layout, or a system diagram. They create data structures which match the specific operations to be performed on them. Hence a first major component of the design database is a collection of st reams of data or "raw design objects". Data which give meaningful relations between raw design objects, such as "hierarchies", are called "meta-data". This part of the design data is efficiently accessible, in that both its structure and its contents are susceptible for instantaneous query and modification in a concurrent environment.
-Data Management Interface (DMI)
All design tools make use of the common repository of design data and meta data, thereby avoiding the needless conversion of various data types. All tools adopt a common design data transaction schema.
-Openness
The ICD system is an "open" system: any tool from outside the project available in source code can easily be adapted to the ICD environment by modifying the source at the places where I/O is performed.
The following results were achieved:
-The project has given rise to two major releases, one at British Telecom (the "ASTRA" system, comprising the contributions of BT and some of the partners) and the other at Delft University of Technology (an integrated system with most of the contributio ns of all the partners, known as the "NELSIS ICD System, Release 1.0"). These systems are used by the partners in their in-house chip design and development work, but are also available to outsiders as prototype releases.
-ASTRA Release 8 is now being used for internal design purposes at British Telecom, and six large designs have also been made. Large designs have been made with the NELSIS-ICD system, together with a large variety of small designs, including analogue cir cuits.
-Various components of the system have been evaluated by outsiders and found to be unique or to out-perform existing solutions:
.The placement and routing system was evaluated by the CAD development section of Philips Elcoma and found to out-perform all others. The prototype was bought by Philips and incorporated in their own system.
.The ICD Frame was evaluated by the Canadian Microelectronics Board, and found to functionally out-perform other systems. A preliminary evaluation of frames for JESSI, executed by Philips Natuurkundig Laboratorium, led to the selection of the ICD Frame a s a possible candidate in the CAD-FRAME project.
.International benchmarks for logic synthesis are presently being defined and will become available shortly. They will be used to test the Eindhoven Logic Synthesis system.
.The 3-D Modelling, Extraction and Verification system is unique in its properties and possibilities. Its impact on the verification of designs in modern submicron technology remains to be gauged. This is being done in cooperation with Philips Natuurkund ig Laboratorium.
-Some novel VLSI designs achieved with the system were:
.CORDIC: a floating-point data-flow processor element capable of achieving n*50 Mflops/s in an array of n processors. Applications: time-critical numerical computations in speech processing, radar, sonar, computer graphics.
.CLP: a pipelined pixel processor capable of real-time image restoration and recognition. Applications: robotics, video signal processing.
.Wafer Scale SIMD PE: a 128 x 128 array of processor elements on a 4" wafer in 1.2 micron technology. Applications: video image processing, pattern recognition, associative and parallel processing.
.KULISH: exact long floating-point accumulation of vector inner products. Applications: signal processing, parallel processing.
.ISDN Coder/Decoder: a mixed analogue/digital chip converting speech signals into a 256 Kbit/s digital signal suited for transmission over an ISDN network.
.WDF: a high-speed 35th order programmable wave digital filter chip with a 300 KHz sampling rate. Applications: digital signal processing at high speeds.
Exploitation
In the further exploitation of these results, both the ASTRA and the NELSIS ICD systems are available as stable releases. They are regularly updated, have a large class of users, and are being incremented with new tools. ASTRA is available at British Tele com, and NELSIS ICD at DDTC (Dimes Design and Test Centre), a subsidiary of the Dimes Institute; both systems are well supported by dedicated support groups. SCORPIO is being alpha-tested with the aim of making it available for mainstream design work. It will also be brought in a consortium of universities in the UK in the context of the ECAD initiative, possibly with the university of Essex as distribution Centre. Experience and software developed in the ICD project is migrating to other projects and systems, namely the Piramid system at Philips Natuurkundig Laboratorium, the NANA project, the EVEREST project, and the JESSI CAD-FRAME project.

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TECHNISCHE UNIVERSITEIT DELFT
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Indirizzo
MELKWEG 4
2600 AA DELFT
Paesi Bassi

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Ultimo aggiornamento: 8 Dicembre 1992

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Permalink: https://cordis.europa.eu/project/id/991/it

European Union, 2024