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Large-Diameter Semi-Insulating GaAs Substrates Suitable for LSI Circuits

Objective

GaAs integrated circuits use an n-type active layer prepared by ion implantation of donors directly in semi-insulating wafers, followed by an annealing to cure the implantation damage. In order to realise LSI circuits, one must accurately control the properties of each individual FET transistor. This can only be achieved if the active layer is itself under perfect control.
This project developed an industrial approach for the preparation of large-diameter (75mm and 100 mm) semi-insulating GaAs substrates which enable the preparation of very homogeneous active layers by ion implantation and then, by mapping the relevant pro perties of each individual micro-FET made, provide feedback on growth conditions.
Three different goals were addressed:
-methods to define material homogeneity for ingots of large diameter by correlating the results of physical characterisation made on bulk material and of device measurements on processed wafers cut from it
-techniques to improve crystalline quality
-growth of ingots of large diameter of suitable quality for LSI manufacturing using the recipes worked out previously.
This project developed an industrial approach for the preparation of large diameter (75 mm and 100 mm) semiinsulating gallium arsenide substrates which enable the preparation of very homogeneous active layers by ion implantation and then, by mappping the relevant properties of each individual micro-field effect transistor (FET) made, provide feedback on growth conditions.

The following results were achieved. The parameters of the thermal model were adapted to the pullers available in this project.
75 mm and 100 mm diameter ingots were grown successfully. The best yield in 1K static random access memory (SRAM) was obtained on wafers grown during this project.
It was shown that fully undoped gallium arsenide wafers obtained by using special conditions and postgrowth annealing treatment can meet the large scale integration (LSI) grade specifications and can even be better than indium alloyed dislocation free substrates.
-the parameters of the thermal model developed by UCL were adapted to the pullers available in this project
-75 mm and 100 mm diameter ingots were grown successfully and made available to other ESPRIT participants to further check their suitability for IC manufacturing
-the best yield in 1K SRAMs was obtained on wafers grown during this project.
-it was shown that fully undoped GaAs wafers obtained by using special conditions and post-growth annealing treatment can meet the LSI grade specifications, and can even be better than In-alloyed dislocation-free substrates.
Exploitation
The results of this project have had a direct and major impact on the capability of one of the partners to supply the best LSI-grade GaAs crystals in the world. At the end of the project, 75 mm diameter semi-insulating GaAs crystals were made available under normal commercial conditions, and 100 mm are expected in the near future.

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Call for proposal

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Funding Scheme

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Coordinator

Laboratoire d'Électronique Philips
EU contribution
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Address
22 avenue Descartes
94453 Limail-Brevannes
France

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Participants (2)