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Silicon Technology for Automotive and Telecommunications Integrated Circuits

Obiettivo

The main objective of STATIC is to develop state-of-the-art application-specific power ICs (ASPICs) for telecommunications and automotive applications. In particular, Alcatel SESA is developing two power-integrated circuits (PIC 1 and 2) to be used in DC/DC converters at the primary and secondary sides of high-voltage telephone lines. In the automotive area, BMW is designing two demonstrators that will be particularly demanding in terms of temperature of operation, noise signal isolation and voltage range.
Detailed target process and demonstrator specifications have been defined. Existing silicon based technologies are being improved in order to increase the degree of circuit functionality (by extending and optimizing the level of on chip integration of analogue and digital components). At the same time, voltages ranging from 30 V (PIC 2) to 150 V (PIC 1) have to be supported. Particular attention has been given to the comparison, simulation and optimization of the different high voltage devices. First measurements of reliability at wafer level have also been performed, to obtain feedback on quality/degradation characteristics at an early stage of process development and integration. Of particular interest were the quality of the high voltage capacitors and the hot carrier characteristics of the N-channel metal oxide semiconductor (NMOS) devices.

An advanced silicon-on-insulator process for smart power applications is under development. The existing technology at 40 V needs to be extended to both high current (30 A) and higher voltages. Starting from the first feasibility test run and the evaluation of trench fabrication and epitaxial quality on separation by implantation of oxygen (SIMOX) material, a number of improvements have been achieved. The expected technological benefits with respect to bulk silicon technologies will be evaluated in the automotive and PIC 2 demonstrators.

The cell library design is under way, with two primary objectives: to enforce cooperation between the different silicon vendors and the system houses, and to characterize all the critical cells that will be used for the demonstrators. Different device/circuit and thermal simulators have also been analyzed and composed.
To achieve the above objective:

- Detailed target process and demonstrator specifications have been defined at the start of the project.

- Existing silicon-based technologies are being improved at Mietec and SGS-Thomson in order to increase the degree of circuit functionality (by extending and optimising the level of on-chip integration of analogue and digital components). At the same time, voltages ranging from 30 V (PIC 2) to 150 V (PIC 1) will have to be supported. Particular attention has been given to the comparison, simulation and optimisation of the different high voltage devices. First measurements of reliability at wafer level have also been performed, to obtain feed back on quality/degradation characteristics at an early stage of process development and integration. Of particular interest were the quality of the high-voltage capacitors and the hot carrier characteristics of the n-MOS devices

- An advanced silicon-on-insulator process for "smart power" applications is under development by ELMOS in cooperation with the Fraunhofer Institute and CNM. The existing technology at 40 V needs in fact to be extended to both high current (30 A) and higher voltages. Starting from the first feasibility test run and the evaluation of trench fabrication and epitaxial quality on SIMOX, a number of improvements have been achieved. The expected technological benefits with respect to bulk silicon technologies will be evaluated in the automotive and PIC 2 demonstrators.

- The cell library design is under way, with two primary objectives: to enforce cooperation between the different silicon vendors and the system houses, and to characterise all the critical cells that will be used for the demonstrators. Different device/circuit and thermal simulators have also been analysed and composed.

A full characterisation of the circuit demonstrators will be carried out, including reliability and user qualification tests. It is also planned to show the system (DC/DC convertor improvements as a direct result of both PIC1 and PIC2 demonstrators, by comparing results obtained in STATIC with an existing reference system.

Argomento(i)

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Invito a presentare proposte

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Meccanismo di finanziamento

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Coordinatore

ALCATEL SESA
Contributo UE
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Indirizzo
RAMIREZ DE PRADO, 5
28045 MADRID
Spagna

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Costo totale
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Partecipanti (8)