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A VHDL design studio

Virtual hardware description language (VHDL) Design Studio (VDS) is a generic graphical user interface developed for any computer aided design (CAD) tools based on the LEDA VHDL Verilog System (LV2S). LV2S is a front-end compilation environment developed by for VHDL and Verilog-based applications. This front-end system allows the syntactic and semantic check of IEEE-1076 VHDL and IEEE-1364 Verilog description and their storage in a binary data format. LV2S is aimed at CAD tool developers. VDS offers a user-friendly interface for the management of VHDL source code files and associated VHDL libraries in the LV2S environment. Menus allow the definition of VHDL projects composed of sets of source files that must be compiled into VHDL libraries. Compilation processes may be performed on a file by file basis, or for a full library, or for the full project. From the compiler message window, a mouse click gives instant access to the corresponding VHDL source code allowing fast turnover during the VHDL development process. A library window displays the content of each VHDL library, on a per unit basis, and allows menu driven action on the VHDL libraries or units. Being a generic graphical user interface, VDS is an open system allowing the integration of LV2S-based applications. Facilities are provided for controlling the execution of such applications, including the display of results by the way of icons of specific result windows.

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