Wspólnotowy Serwis Informacyjny Badan i Rozwoju - CORDIS

Development of an RF-test-chip for the benchmark case

"Development of an RF-test-chip for the Benchmark case".

The task was to implement passive structures (like resistors, capacitors and inductors) for simulator benchmarking. The realized structures were close to the recent requirements of foundry customers. This way real-life solutions could be tested both on the measurement and electromagnetic simulation sides. For the Parties involved in the simulations it was necessary to obtain as accurate measurement data as possible.

This was achieved by s-parameter measurements with industry-standard calibration techniques including open-short deem bedding. The technology data was collected on the basis of in-process control (MAP or PCM) statistics. A few key parameters were also verified by measurements on a special (capacitor) test-chip. It included dedicated structures in order to double-check diverse oxide and metal layer thickness. This additional option to the Project confirmed an excellent agreement with the MAP data on the particular wafer. In addition to the standard benchmark scenarios a set of advanced structures were also provided. Among these designs were basic spiral-capacitor tank circuits, coupled inductors and diverse galvanic substrate connections to test various EM shielding techniques.

The test chip was implemented in a state-of-art 0.35um BiCMOS SiGe HBT technology developed by Austria Microsystems. All data like s-parameters from the different devices, GDS layer information, technology parameters and the relevant textual explanation were provided for the CODESTAR project in a consistent manner. The scheme preserved the coherency of the various information types and made it possible the safe and easy identification of the selected items.

Reported by

austriamicrosystems AG
Schloss Premstaetten
8141 Unterpremstatten
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