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Development of a High Temperature Stress Test (HTST) system

The development of the initial HTST (High Temperature Stress Test) System was an integration of two previous tasks, namely, 'Tester /Oven Interface Development' and 'Implementation of BOST for V/I Testing'. This merger resulted in the creation of an 'Intelligent Burn-in' system in which devices can be continuously stimulated by functional test patterns and their responses continuously monitored whilst being subjected to high temperature stress over a prolonged time period.

The current system which, has commercial, potential, is called LOCHITT (LOw Cost HIgh Temperature Stress Test) features:
Test software also includes Analogue Waveform Editor (AWE), Digital Waveform Editor(DWE). The DWE and AWE can be used easily to design the test patterns providing greater flexibility for the user to modify/generate waveforms in order to test different types of analogue and digital functions.

Overall the test system has the capability of performing:
- “Current Ratio” Measurements.
- Memory Tests.
- Scan Testing.
- Dynamic “Burn-in”.
- Analysis of high temperature test runs.
- Basic Tests on ADCs/DACs.

It is considered that this system has commercial potential, finding wide spread use in application where it is necessary to establish the reliability of semiconductor systems without tying up expensive ATE for long periods of time, which would not only be costly but also impractical.

Applicable to a wide range of test scenarios, e.g. reliability testing, failure mode analysis etc.

System is highly flexible and low cost.

Would be of interest to companies involved with the manufacture or use of high temperature electronic devices and systems.

This spans companies from the automotive industry, oil well exploration, aeronautics/aerospace etc.

Informations connexes

Reported by

University of Newcastle upon Tyne
School of Electrical, Electronic & Computer Eng, Merz Court
NE1 7RU Newcastle upon Tyne
United Kingdom