Community Research and Development Information Service - CORDIS

Assembling a smarter memory chip in Europe

EU researchers are developing techniques to improve the performance of memory systems in multi-core architectures. Multiple central processing units (CPUs) or cores can run multiple instructions at the same time, thereby increasing a computer system's overall speed.
Assembling a smarter memory chip in Europe
In the past few decades, advances in silicon process technology have enabled processor performance to double almost every two years. However, memory system performance has not kept pace with processor performance in modern systems.

The SMART MEMORY SYSTEM project was set up to address these issues. Funded by the EU, it aims primarily to enhance the memory controllers in an effort to improve the system's operation. Specifically, the project intends to create an accurate simulation environment to design and evaluate techniques for improving multi-core systems. In addition, the researchers will develop innovative memory functions and power management techniques for such systems.

Modern multi-core processors with an on-chip memory controller make hardware architecture and software design increasingly complex and costly. Therefore, simulation technology is used to verify and optimise systems under development.

During the first stage of the SMART MEMORY SYSTEM project a simulator was built using models for the power processor and the single synergistic processing elements. Based on this technology, the functional and performance features of both elements have been verified and found to be suitable.

With its simulation technology in place, the SMART MEMORY SYSTEM team can now move on to testing its novel proposals for improving the overall performance of memory systems. The impact of a successful project outcome will be a reduced disparity between the microprocessor and memory performance of multi-core systems.

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