Final Report Summary - GYROWING (Highly integrated ultra-low-noise Gyrometer solution for Smart Fixed Wing Aircraft)
Executive Summary:
The aim of this project was to develop a full ASIC with functionalities (low noise sensing path, high linear feedback DACs, high voltage compatibility, high noise resilience capability, providing its own clock signal, with auxiliary ADC, etc.) required to interface the MEMS Gyrix G-HP-10 provided by TAV.
An MPW opportunity on February-13 at TSMC's foundry has been taken on our own funds to obtain a prompt preliminary status of performances level of the main expected functions. Consequently, this first run has consisted in the architecture analysis to specify and develop the main internal functions of the ASIC (sensing paths, excitation and compensation feedback DACs, power management features). Once the design and fabrication phases achieved, the measurement in lab has highlighted some gap between measured performances and targeted specifications, resulting in a diagnostic analysis.
The status was that the major parts of the non-conformities of ASIC features were linked to test environment. Finally, the ASIC is almost all functional. The gap of performances between measurements and specifications were all analyzed and fully understood. For that, after the end of the project (June 2014), some diagnostics have been led for mastering all remaining concerns and upgrade our methodology and knowledge. Dolphin has thus decided to move forward to this diagnostic and has added huge efforts to close the totality of the remaining symptoms. We thus finished to understand the root cause of several non-conformities such as low gain of the X sensing path relating to the specification or such as the calibration sequence of Trimming and Quadrature paths. In parallel of the diagnostic phase, the use of the current ASIC has been possible thanks to workarounds with discrete electronic components on the PCB, thus enabling the Topic Manager to perform system-level tests (sensor + ASIC) and take benefit of the ASIC at early stage.
Today, the confidence level reached on the correlation between measurements and simulations results allows us to positively close the project, with a full understanding on High Voltage features and a full mastering of the level of performance, with respect to targeted performances. The design workload to fix the non-conformities on performances has been completed.
Finally, the final ASIC has enabled to demonstrate the capability to achieve all targeted performances, which lead to a successful conclusion on the GyroWing project: the joint collaboration with the Topic Manager, supported by the CleanSky JU grants, has consequently to provide a state-of-the-art electronics interface for MEMS gyrometer.
Project Context and Objectives:
The GyroWing project is part of the global project “Smart Fixed Wing Aircraft” (SFWA), coordinated by Airbus and SAAB AB. The SFWA objectives address environmental issue (by increasing the performances of aircraft) and passenger comfort (in reducing noise level).
The three main objectives are defined as following:
• reduce the aircraft drag by 10%
• reduce the fuel burn of aircraft by 20%
• reduce the aircraft noise by up to 10.
The GyroWing project especially addresses the first objective, where inertial measurement units are required in the field of flow and load control systems as applied to the wings of civil aircraft.
Based on a nineteen-month duration, the GyroWing project targets the realization of a fully integrated ASIC for MEMS gyrometer. The integration level must include the control electronics, but also all peripherals required for such a system (sensing paths, HF carrier, compensation paths, voltage reference, regulators…).
The ASIC has to be adapted to the MEMS Gyrix G-HP-10 provided by TAV, and with the final objective to achieve a sufficient Technological Readiness Level (TRL) for the SFWA global objectives.
Most of current gyrometer involve discrete control electronics, which means a large set of external component, additionally to the peripherals components (references, regulators, oscillators) and a micro-controller. It results in a large final solution, weighty, voluminous and costly.
The GyroWing project will aim at realizing a single-SoC design for these parts (micro-controller integration must be discussed), and consequently consider the following challenges:
• Realizing a high performances system: the main critical issue will be the performances achievement as the solution must stay competitive. Indeed, the inertial measurement unit is firstly compared on their performances, so they will be consider as a mandatory key feature. Electrical noise level of the sensing paths is one of the keys of success of such a system.
• Integrating references of circuit: the voltage reference is a fundamental element for all analog-digital converters and theirs performances directly define the system performances. Voltage references are generally external component due to their design sensitivities and calibration requirements. Consequently, their cost is often expensive. As a high performances inertial measurement units requires calibration, so the advantages of using only one component is also to enable calibration in interfacing only one component
• Integrating the power management unit: high-resolution inertial measurement units could require high voltage supplies, as defined on this project. Consequently, the power management could become very complex if we aim at using high voltage supplies only where needed (in order to save power consumption). The GyroWing project will integrate the overall power management unit
Integrating HF carrier and compensation paths (if any): depending on the gyrometer principle, some additional paths could be required to create a high frequency carrier, or to compensate non-linear phenomena. If such options are required, the GyroWing project aims at integrating these options.
Project Results:
Since July 2013, during the phase of negotiation of the Implementation Agreement and of the Grant Agreement, engineering work have been started to converge on ASIC specifications in term of integration feasibility and risk analysis.
During the first month, a first decision was to catch the opportunity of an intermediate run (run #1) in February-2013, on its own funding. Indeed, the preliminary analysis has shown that it was possible to embed most of critical function on a testchip which had been scheduled in February 2013, consequently, a first run has been launched at TSMC foundry in order to mitigate risks relating to the most sensitive functions of the circuit. Thus, the power management unit (with high voltage option and noise resilience), the analog interfaces (with the low noise constraints for the sensing paths and high linearity constraints for the feedback paths) have been candidates for this first run. The aim was to characterize these current functions on silicon in this targeted foundry to speeding-up correlation between performances and silicon on high-voltage process.
Consequently, the first quarter has required major effort in terms of resources to target this testchip. Another consequence on the WP1, due to this effort for reaching the run on February-2013, was that some complete deliverables have shifted relating to the initial plan. Indeed, because only a part –but the most important– of the expected functions have been integrated, the following documents were not enough mature for delivery: "User requirements specification", "Sensor model", "Targeted technical specification for all blocks" and "ASIC specifications". The achievement of these deliverables has been postponed over the following months, in considering the results of the run #1.
The resource team faced several technical challenges such as:
• Trade-off between functions accuracy (such as linearity, noise resilient) and die area. The limitation is due to chip volume constraints for better integration at top level of system
• Trade-off between consumption target and performances of functions, but also with number of functions regarding to silicon area.
• ASIC Floor plan for being compliant with sensor access constraints.
It has also to be noted that the first chips had been altered by a failure at foundry location. This fabrication iteration on foundry side caused delay (1 month), because the process data of the first set of wafer did not fit with model specifications.
After this tape-out, the measurements have enabled to demonstrate that the envisioned performances have been achieved on silicon, and to early observe and diagnose some issues on High-Voltage features, on start-up sequence of the X-sensing path.
Some work-around solutions have been defined to permit the use of this first ASIC into the THALES application for further characterization. In order to avoid dispersing with other new functions, a trade-off has been defined with the Topic Manager.
As the diagnostic of High Voltage features were a long and tricky job (correlation between measurements and simulations with non-mature high voltage models from the foundry), the schedule has significantly delayed, but thanks to this early run#1, such difficulties have been observed during the first year of project.
According to the performances completion and diagnostic conclusions, decisions have been taken with the Topic Manager to fix the functions of the first run and remove the remaining functions (DCDC, HF carrier DAC functions).
Consequently, the second period has been expected to concentrate the effort to fix functions of the run. #1 in a second run (run #2) into the same foundry and technology target.
The second period has thus enable to characterize and diagnose the concerns which have been previously identified. After thorough investigation, it appears that some of differences were due to test environment, and not from the ASIC. Indeed the nature of this project has required to permanently upgrade the test environment to top-notch measurement performances, with regard to performance targeted with the ASIC: the high performances targeted for this ASIC (state of art for a such integrated circuit) requires high performances measurement devices. Some tunings for removing parasitic elements on test environment have been done. Consequently, the diagnostic phase has permitted to discover design root causes, but also to upgrade the test environment for updating measurement results.
At the end of the period (June 2014), some design parts have been fixed, but many concerns remained as unresolved. Dolphin has thus decided to achieve the analysis and the fix of design. This additional work has finally enabled to understand all remaining issue, which appears to be on measurement workflow, and not is the ASIC that is finally at the expected performance level.
Finally, the final ASIC has enabled to demonstrate the capability to achieve all targeted performances, which lead to a successful conclusion on the project.
1 Technical report
1.1 Technical constraints
Processes referred initially were standard CMOS processes 3.3 V / 1.8 V or 3.3 V / 1.2 V (depending on the final choice of 180nm or 130nm manufacturing) with the possible MiM capacitance option. Available components for the final are:
- MOS Transistors 3.3 V and 1.8 V (or 1.2 V 130nm), including native transistors
- PNP bipolar transistors available in standard CMOS (collector substrate)
- Capacities MiM and MoM
- Standard Resistors (without option) , usually with p + poly salicide
Constraints associated with the needs of high voltage (up to 20V) to implement MEMS provided by THALES leads us to make use of high voltage technology, which leaves us with standard CMOS technologies.
1.2 Methodology
The working method of DOLPHIN on this kind of system is to achieve the necessary modeling of the sensor and the electronics to make possible the simulation of the complete system after correlation with the theory. This allows:
• to test the theory with more detailed simulations and with taking into account a large number of variable parameters.
• to ensure, before physical implementation, the functionality with defined constraints guaranteeing its performance
• to study the robustness of the whole system according to the variation of the parameters (electronic or mechanical) to optimize performance in mass-production step.
• to reach a compromise solution between area, measurement accuracy , etc.
• to enable all levels of modeling (behavioral design to transistor level) validation of the electronic part in relation to the sensor interface
• to ensure the correlation between the measurement results with the simulation results in order to properly adjust the simulation models (VFP - Virtual Fabrication Process)
• to define a sufficiently robust and configurable electronic to support the fluctuations of sensor.
For this, the sensor model containing the main influential parameters with dispersion characteristics is validated with THALES. For this, it is necessary to be able to rely on a joint simulator as SMASHTM (Dolphin Integration), including recognition features of equivalence (proof of equivalence between levels modelization) and analysis tools for robustness validation (Monte Carlo simulation and Imbalance Locate analysis for analytical variation stages).
These constraints are essential to achieve the specification of a library available for the targeted application segments.
1.3 Architecture
This important step of the project consisted in modeling and simulation phases (with non-linear effects) of the electrical interface of the sensor. The aim of this step was to define noise budget of each functions of the chain in order to specify them for the implementation phase. The detail of this budget is defined in the document D1.3_GyrometerSpecifications.pdf.
Thanks to this work, Dolphin was able to complete his knowledge about inertial architectures and to master the electronic sensor interface design for gyroscope.
1.4 Design
For mitigating risks of the main functions of the ASIC according to the high voltage capability and the noise level features, a first run has been realized for an ASIC with a reduced number of functions. The technical interest of this run was to narrow the gap between Silicon measurements and model simulation results with a reduced number of parameters.
The results of the implementation phase shows the targets were reached for majority of the specifications and for the others, workarounds and solutions for improvement was defined.
Refer to the document D2.2_GIGA_ConformityMatrix_Analog_r1.1.xls.
1.5 Prototype validation
During the validation phase in Dolphin laboratory, two dysfunctions have been discovered relating to the function linked to high voltage domain, two different FIB operations have permitted to progress in ASIC validation.
1.5.1 Results before FIB operation
The following high voltage functions was impacted by the dysfunction, they could not generate output signal due to misuses of diodes of protection and of transistor for clamp functions:
• High voltage regulator
• DAC outputs for X and Y excitation path
• DAC outputs for Trimming and Quadrature path
The dysfunction analysis permit to detect design root causes of the issues and plan two Focused Ion Beam (FIB) operation on several prototype chipsets. Thus, these operations have permited us to progress in the validation of these functions. The FIB consisted in more than 30 metallization cuts to disconnect diodes and misuse clamp transistor located in Primary protection functions.
1.5.2 Results after FIB operation
Once FIB operations done on couple of chipset, the entire high voltage functions could be measured and the functionality of excitation, non-linearity compensation, trimming and quadrature paths was proved.
Additional analysis has been planned with measurement from TAV test environment in order to upgrade the VFP phase. Test environment of TAV is more complete with the sensor cell and feedback algorithm, which closes the loop of the system and feature a real inertial measurement unit.
1.5.3 Functionality and performances
Functions are functional if their operating modes are available. Then, the performances level is considered and compared with specifications. The following graphic shows the current status of functionality of the ASIC:
This run #1 permits to prove that 95% of this ASIC is functional and achieve the needed level of performances. Some diagnostics addressed the following item:
• Unavailibility of high voltage outputs of DAC functions for excitation and compensation paths due to bad connexions of diode. Proved by FIB operation.
• Over current appears on the high voltage supply. Some depth analysis with thermal localization tool is in progress to better focus on the origin of the issue. Finally the root cause is linked to an obsolete foundry rules which have been follow during the design and which occure a short-circuit into the High voltage IO protection devices. Proved by a second FIB operation.
The rest-of-functionalities of the ASIC for this run #1 finally complies with the specification.
The results of measurements of this first ASIC version are given in the document D4.4_GIGA_SiliconMeasurement_r1.7.pdf.
1.6 Prototype characterization and correlation report
The characterization phase has consisted to measure performances in depth of the ASIC, environmental variation (voltage, temperature) and topological parasitic impact on measurements. Some ESD and latch-up tests have been done in the frame of the analysis of the symptom relating to the over currents in the high voltage domain. The ASIC is resilient to ESD and latch-up events.
Potential Impact:
Marketing studies have been undertaken in order to specify the compatible market according to vibration sensors and to associate with these markets performance levels required for their selection and specification.
The approach consists in determining classes of sensor performance (after determining the main characteristics of the comparison as bias stability or random walk), determining the markets associated with these classes for vibration sensors, and determining target markets related with the level of performance required.
It will result from this selection a set of markets, a range of performance and therefore a specification with ranges of conditions and performances that will determine the specifications of the elements of the library design.
The main applications are analyzed:
- Trajectory control, homing (satellites, drilling)
- Attitude control (robots, inclinometer)
- Piloting assistance
- Seismographic detection
- Using GPS navigation when losing the satellite link (dead reckoning)
- Image Stabilizer
- Mobile telecommunications systems
- Multimedia public
It appears that the gyroscopes are divided into three main classes: Rate Grade / Tactical Grade / Inertial Grade.
The traditional mechanical gyroscope has a better bias stability (low drift), followed by optical and micromechanical gyroscopes (MEMS).
Project benefits:
At this stage, the following benefits envisaged for the project are:
• the achievement of ASIC THALES gyroscope, integrating a set of additional functions to increase the degree of integration of systems: this ASIC would have avionics application benefits.
• a set of benefits in the spatial domain is being considered, in partnership with stakeholders in this field. This would involve making robust radiation ASIC being developed to pass all the tests of spatial skills (SEI tests, SEU, SEL and TID particular).
To increase the potential benefits, other contacts are active beyond the THALES group, including interactions with research laboratories (ONERA), other companies specializing in MEMS (MEMSCAP, TRONICS) or specializing in equipment (such as SAGEM). It is also noted that Dolphin participates with THALES AVIONICS and TRONICS to the TechDays Aerospace Cluster Rhône-Alpes, in February 2014 with our involvement in the IMU.
All of this reinforces the potential of GyroWing project, and in our desire to offer integrated solutions for high performance inertial. However, compared to the so-called "consumer", the analysis reflects a significant difference in performance.
The specific nature of each MEMS sensor makes it difficult recurrence at low prices, as imposed on these segments. The difference in performance is such that the blocks cannot be competitive as such (the difference in consumption and surface).
The major market dissemination will thus target avionics and space domains stay the main for which we operate. The final technical ending lies in the improvement of air penetration devices through various measures incurred on aircraft wings forces. The challenge is to reduce overall fuel consumption and increase the ability to launch devices (increase the number of people or cargo in the unit).
Dissemination activities has been described in deliverables D5.4 - Dissemination report.
The aim of this project was to develop a full ASIC with functionalities (low noise sensing path, high linear feedback DACs, high voltage compatibility, high noise resilience capability, providing its own clock signal, with auxiliary ADC, etc.) required to interface the MEMS Gyrix G-HP-10 provided by TAV.
An MPW opportunity on February-13 at TSMC's foundry has been taken on our own funds to obtain a prompt preliminary status of performances level of the main expected functions. Consequently, this first run has consisted in the architecture analysis to specify and develop the main internal functions of the ASIC (sensing paths, excitation and compensation feedback DACs, power management features). Once the design and fabrication phases achieved, the measurement in lab has highlighted some gap between measured performances and targeted specifications, resulting in a diagnostic analysis.
The status was that the major parts of the non-conformities of ASIC features were linked to test environment. Finally, the ASIC is almost all functional. The gap of performances between measurements and specifications were all analyzed and fully understood. For that, after the end of the project (June 2014), some diagnostics have been led for mastering all remaining concerns and upgrade our methodology and knowledge. Dolphin has thus decided to move forward to this diagnostic and has added huge efforts to close the totality of the remaining symptoms. We thus finished to understand the root cause of several non-conformities such as low gain of the X sensing path relating to the specification or such as the calibration sequence of Trimming and Quadrature paths. In parallel of the diagnostic phase, the use of the current ASIC has been possible thanks to workarounds with discrete electronic components on the PCB, thus enabling the Topic Manager to perform system-level tests (sensor + ASIC) and take benefit of the ASIC at early stage.
Today, the confidence level reached on the correlation between measurements and simulations results allows us to positively close the project, with a full understanding on High Voltage features and a full mastering of the level of performance, with respect to targeted performances. The design workload to fix the non-conformities on performances has been completed.
Finally, the final ASIC has enabled to demonstrate the capability to achieve all targeted performances, which lead to a successful conclusion on the GyroWing project: the joint collaboration with the Topic Manager, supported by the CleanSky JU grants, has consequently to provide a state-of-the-art electronics interface for MEMS gyrometer.
Project Context and Objectives:
The GyroWing project is part of the global project “Smart Fixed Wing Aircraft” (SFWA), coordinated by Airbus and SAAB AB. The SFWA objectives address environmental issue (by increasing the performances of aircraft) and passenger comfort (in reducing noise level).
The three main objectives are defined as following:
• reduce the aircraft drag by 10%
• reduce the fuel burn of aircraft by 20%
• reduce the aircraft noise by up to 10.
The GyroWing project especially addresses the first objective, where inertial measurement units are required in the field of flow and load control systems as applied to the wings of civil aircraft.
Based on a nineteen-month duration, the GyroWing project targets the realization of a fully integrated ASIC for MEMS gyrometer. The integration level must include the control electronics, but also all peripherals required for such a system (sensing paths, HF carrier, compensation paths, voltage reference, regulators…).
The ASIC has to be adapted to the MEMS Gyrix G-HP-10 provided by TAV, and with the final objective to achieve a sufficient Technological Readiness Level (TRL) for the SFWA global objectives.
Most of current gyrometer involve discrete control electronics, which means a large set of external component, additionally to the peripherals components (references, regulators, oscillators) and a micro-controller. It results in a large final solution, weighty, voluminous and costly.
The GyroWing project will aim at realizing a single-SoC design for these parts (micro-controller integration must be discussed), and consequently consider the following challenges:
• Realizing a high performances system: the main critical issue will be the performances achievement as the solution must stay competitive. Indeed, the inertial measurement unit is firstly compared on their performances, so they will be consider as a mandatory key feature. Electrical noise level of the sensing paths is one of the keys of success of such a system.
• Integrating references of circuit: the voltage reference is a fundamental element for all analog-digital converters and theirs performances directly define the system performances. Voltage references are generally external component due to their design sensitivities and calibration requirements. Consequently, their cost is often expensive. As a high performances inertial measurement units requires calibration, so the advantages of using only one component is also to enable calibration in interfacing only one component
• Integrating the power management unit: high-resolution inertial measurement units could require high voltage supplies, as defined on this project. Consequently, the power management could become very complex if we aim at using high voltage supplies only where needed (in order to save power consumption). The GyroWing project will integrate the overall power management unit
Integrating HF carrier and compensation paths (if any): depending on the gyrometer principle, some additional paths could be required to create a high frequency carrier, or to compensate non-linear phenomena. If such options are required, the GyroWing project aims at integrating these options.
Project Results:
Since July 2013, during the phase of negotiation of the Implementation Agreement and of the Grant Agreement, engineering work have been started to converge on ASIC specifications in term of integration feasibility and risk analysis.
During the first month, a first decision was to catch the opportunity of an intermediate run (run #1) in February-2013, on its own funding. Indeed, the preliminary analysis has shown that it was possible to embed most of critical function on a testchip which had been scheduled in February 2013, consequently, a first run has been launched at TSMC foundry in order to mitigate risks relating to the most sensitive functions of the circuit. Thus, the power management unit (with high voltage option and noise resilience), the analog interfaces (with the low noise constraints for the sensing paths and high linearity constraints for the feedback paths) have been candidates for this first run. The aim was to characterize these current functions on silicon in this targeted foundry to speeding-up correlation between performances and silicon on high-voltage process.
Consequently, the first quarter has required major effort in terms of resources to target this testchip. Another consequence on the WP1, due to this effort for reaching the run on February-2013, was that some complete deliverables have shifted relating to the initial plan. Indeed, because only a part –but the most important– of the expected functions have been integrated, the following documents were not enough mature for delivery: "User requirements specification", "Sensor model", "Targeted technical specification for all blocks" and "ASIC specifications". The achievement of these deliverables has been postponed over the following months, in considering the results of the run #1.
The resource team faced several technical challenges such as:
• Trade-off between functions accuracy (such as linearity, noise resilient) and die area. The limitation is due to chip volume constraints for better integration at top level of system
• Trade-off between consumption target and performances of functions, but also with number of functions regarding to silicon area.
• ASIC Floor plan for being compliant with sensor access constraints.
It has also to be noted that the first chips had been altered by a failure at foundry location. This fabrication iteration on foundry side caused delay (1 month), because the process data of the first set of wafer did not fit with model specifications.
After this tape-out, the measurements have enabled to demonstrate that the envisioned performances have been achieved on silicon, and to early observe and diagnose some issues on High-Voltage features, on start-up sequence of the X-sensing path.
Some work-around solutions have been defined to permit the use of this first ASIC into the THALES application for further characterization. In order to avoid dispersing with other new functions, a trade-off has been defined with the Topic Manager.
As the diagnostic of High Voltage features were a long and tricky job (correlation between measurements and simulations with non-mature high voltage models from the foundry), the schedule has significantly delayed, but thanks to this early run#1, such difficulties have been observed during the first year of project.
According to the performances completion and diagnostic conclusions, decisions have been taken with the Topic Manager to fix the functions of the first run and remove the remaining functions (DCDC, HF carrier DAC functions).
Consequently, the second period has been expected to concentrate the effort to fix functions of the run. #1 in a second run (run #2) into the same foundry and technology target.
The second period has thus enable to characterize and diagnose the concerns which have been previously identified. After thorough investigation, it appears that some of differences were due to test environment, and not from the ASIC. Indeed the nature of this project has required to permanently upgrade the test environment to top-notch measurement performances, with regard to performance targeted with the ASIC: the high performances targeted for this ASIC (state of art for a such integrated circuit) requires high performances measurement devices. Some tunings for removing parasitic elements on test environment have been done. Consequently, the diagnostic phase has permitted to discover design root causes, but also to upgrade the test environment for updating measurement results.
At the end of the period (June 2014), some design parts have been fixed, but many concerns remained as unresolved. Dolphin has thus decided to achieve the analysis and the fix of design. This additional work has finally enabled to understand all remaining issue, which appears to be on measurement workflow, and not is the ASIC that is finally at the expected performance level.
Finally, the final ASIC has enabled to demonstrate the capability to achieve all targeted performances, which lead to a successful conclusion on the project.
1 Technical report
1.1 Technical constraints
Processes referred initially were standard CMOS processes 3.3 V / 1.8 V or 3.3 V / 1.2 V (depending on the final choice of 180nm or 130nm manufacturing) with the possible MiM capacitance option. Available components for the final are:
- MOS Transistors 3.3 V and 1.8 V (or 1.2 V 130nm), including native transistors
- PNP bipolar transistors available in standard CMOS (collector substrate)
- Capacities MiM and MoM
- Standard Resistors (without option) , usually with p + poly salicide
Constraints associated with the needs of high voltage (up to 20V) to implement MEMS provided by THALES leads us to make use of high voltage technology, which leaves us with standard CMOS technologies.
1.2 Methodology
The working method of DOLPHIN on this kind of system is to achieve the necessary modeling of the sensor and the electronics to make possible the simulation of the complete system after correlation with the theory. This allows:
• to test the theory with more detailed simulations and with taking into account a large number of variable parameters.
• to ensure, before physical implementation, the functionality with defined constraints guaranteeing its performance
• to study the robustness of the whole system according to the variation of the parameters (electronic or mechanical) to optimize performance in mass-production step.
• to reach a compromise solution between area, measurement accuracy , etc.
• to enable all levels of modeling (behavioral design to transistor level) validation of the electronic part in relation to the sensor interface
• to ensure the correlation between the measurement results with the simulation results in order to properly adjust the simulation models (VFP - Virtual Fabrication Process)
• to define a sufficiently robust and configurable electronic to support the fluctuations of sensor.
For this, the sensor model containing the main influential parameters with dispersion characteristics is validated with THALES. For this, it is necessary to be able to rely on a joint simulator as SMASHTM (Dolphin Integration), including recognition features of equivalence (proof of equivalence between levels modelization) and analysis tools for robustness validation (Monte Carlo simulation and Imbalance Locate analysis for analytical variation stages).
These constraints are essential to achieve the specification of a library available for the targeted application segments.
1.3 Architecture
This important step of the project consisted in modeling and simulation phases (with non-linear effects) of the electrical interface of the sensor. The aim of this step was to define noise budget of each functions of the chain in order to specify them for the implementation phase. The detail of this budget is defined in the document D1.3_GyrometerSpecifications.pdf.
Thanks to this work, Dolphin was able to complete his knowledge about inertial architectures and to master the electronic sensor interface design for gyroscope.
1.4 Design
For mitigating risks of the main functions of the ASIC according to the high voltage capability and the noise level features, a first run has been realized for an ASIC with a reduced number of functions. The technical interest of this run was to narrow the gap between Silicon measurements and model simulation results with a reduced number of parameters.
The results of the implementation phase shows the targets were reached for majority of the specifications and for the others, workarounds and solutions for improvement was defined.
Refer to the document D2.2_GIGA_ConformityMatrix_Analog_r1.1.xls.
1.5 Prototype validation
During the validation phase in Dolphin laboratory, two dysfunctions have been discovered relating to the function linked to high voltage domain, two different FIB operations have permitted to progress in ASIC validation.
1.5.1 Results before FIB operation
The following high voltage functions was impacted by the dysfunction, they could not generate output signal due to misuses of diodes of protection and of transistor for clamp functions:
• High voltage regulator
• DAC outputs for X and Y excitation path
• DAC outputs for Trimming and Quadrature path
The dysfunction analysis permit to detect design root causes of the issues and plan two Focused Ion Beam (FIB) operation on several prototype chipsets. Thus, these operations have permited us to progress in the validation of these functions. The FIB consisted in more than 30 metallization cuts to disconnect diodes and misuse clamp transistor located in Primary protection functions.
1.5.2 Results after FIB operation
Once FIB operations done on couple of chipset, the entire high voltage functions could be measured and the functionality of excitation, non-linearity compensation, trimming and quadrature paths was proved.
Additional analysis has been planned with measurement from TAV test environment in order to upgrade the VFP phase. Test environment of TAV is more complete with the sensor cell and feedback algorithm, which closes the loop of the system and feature a real inertial measurement unit.
1.5.3 Functionality and performances
Functions are functional if their operating modes are available. Then, the performances level is considered and compared with specifications. The following graphic shows the current status of functionality of the ASIC:
This run #1 permits to prove that 95% of this ASIC is functional and achieve the needed level of performances. Some diagnostics addressed the following item:
• Unavailibility of high voltage outputs of DAC functions for excitation and compensation paths due to bad connexions of diode. Proved by FIB operation.
• Over current appears on the high voltage supply. Some depth analysis with thermal localization tool is in progress to better focus on the origin of the issue. Finally the root cause is linked to an obsolete foundry rules which have been follow during the design and which occure a short-circuit into the High voltage IO protection devices. Proved by a second FIB operation.
The rest-of-functionalities of the ASIC for this run #1 finally complies with the specification.
The results of measurements of this first ASIC version are given in the document D4.4_GIGA_SiliconMeasurement_r1.7.pdf.
1.6 Prototype characterization and correlation report
The characterization phase has consisted to measure performances in depth of the ASIC, environmental variation (voltage, temperature) and topological parasitic impact on measurements. Some ESD and latch-up tests have been done in the frame of the analysis of the symptom relating to the over currents in the high voltage domain. The ASIC is resilient to ESD and latch-up events.
Potential Impact:
Marketing studies have been undertaken in order to specify the compatible market according to vibration sensors and to associate with these markets performance levels required for their selection and specification.
The approach consists in determining classes of sensor performance (after determining the main characteristics of the comparison as bias stability or random walk), determining the markets associated with these classes for vibration sensors, and determining target markets related with the level of performance required.
It will result from this selection a set of markets, a range of performance and therefore a specification with ranges of conditions and performances that will determine the specifications of the elements of the library design.
The main applications are analyzed:
- Trajectory control, homing (satellites, drilling)
- Attitude control (robots, inclinometer)
- Piloting assistance
- Seismographic detection
- Using GPS navigation when losing the satellite link (dead reckoning)
- Image Stabilizer
- Mobile telecommunications systems
- Multimedia public
It appears that the gyroscopes are divided into three main classes: Rate Grade / Tactical Grade / Inertial Grade.
The traditional mechanical gyroscope has a better bias stability (low drift), followed by optical and micromechanical gyroscopes (MEMS).
Project benefits:
At this stage, the following benefits envisaged for the project are:
• the achievement of ASIC THALES gyroscope, integrating a set of additional functions to increase the degree of integration of systems: this ASIC would have avionics application benefits.
• a set of benefits in the spatial domain is being considered, in partnership with stakeholders in this field. This would involve making robust radiation ASIC being developed to pass all the tests of spatial skills (SEI tests, SEU, SEL and TID particular).
To increase the potential benefits, other contacts are active beyond the THALES group, including interactions with research laboratories (ONERA), other companies specializing in MEMS (MEMSCAP, TRONICS) or specializing in equipment (such as SAGEM). It is also noted that Dolphin participates with THALES AVIONICS and TRONICS to the TechDays Aerospace Cluster Rhône-Alpes, in February 2014 with our involvement in the IMU.
All of this reinforces the potential of GyroWing project, and in our desire to offer integrated solutions for high performance inertial. However, compared to the so-called "consumer", the analysis reflects a significant difference in performance.
The specific nature of each MEMS sensor makes it difficult recurrence at low prices, as imposed on these segments. The difference in performance is such that the blocks cannot be competitive as such (the difference in consumption and surface).
The major market dissemination will thus target avionics and space domains stay the main for which we operate. The final technical ending lies in the improvement of air penetration devices through various measures incurred on aircraft wings forces. The challenge is to reduce overall fuel consumption and increase the ability to launch devices (increase the number of people or cargo in the unit).
Dissemination activities has been described in deliverables D5.4 - Dissemination report.