Other documents
- Video introduction to the project
- Website (first preliminary version)
- Impact of defects and variability sources in III-V based TFETs
- Compact modelling of TFETs including layout parasitics
- Roadmap for commercial use of E2SWITCH results
- Calibrated band-to-band tunnelling models in Sentaurus-Device for Si/SiGe, Si/III-V, and all-III-V
- Complete intrinsic compact model for n- and p-TFETs
- Project flyer
- Final public E2SWITCH workshop
- Experimental characteristics of EHBTFET subthermal switch
- Optimum design parameters for n-type and p-type TFETs
- Influence of strain in III-V materials
- Strain, band energy profiles and performance of Si-Ge-Sn heterostructure TFETs
- Press release at the project start
- Simulation-based investigation of the effect of dimensionality in DOS TFET
- Characterization and simulation of inverters
- Press release in the project end
- Results on mixed device-circuit simulations of digital building\nblocks
- Design report on logic cell designs on vertical TFET\ntechnology
- First Public E2SWITCH Workshop
- First update of the Plan for Use and Dissemination of\nForeground (PUDF)
