Wave-Locked Loop for Frequency Synthesis (WLL)

Pubblicazioni

A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f 3 corner

Autori: Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
Pubblicato in: ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, 2017, Pagina/e 87-90, ISBN 978-1-5090-5025-3
Editore: IEEE
DOI: 10.1109/esscirc.2017.8094532

A 15-μW, 103-fs step, 5-bit capacitor-DAC-based constant-slope digital-to-time converter in 28nm CMOS

Autori: Peng Chen, Feifei Zhang, Zhirui Zong, Hao Zheng, Teerachot Siriburanon, Robert Bogdan Staszewski
Pubblicato in: 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2017, Pagina/e 93-96, ISBN 978-1-5386-3178-2
Editore: IEEE
DOI: 10.1109/asscc.2017.8240224

Intuitive Understanding of Flicker Noise Reduction via Narrowing of Conduction Angle in Voltage-Biased Oscillators

Autori: Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
Pubblicato in: IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, Pagina/e 1-1, ISSN 1549-7747
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsii.2019.2896483

A Low-Flicker-Noise 30-GHz Class-F 23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path

Autori: Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
Pubblicato in: IEEE Journal of Solid-State Circuits, Numero 53/7, 2018, Pagina/e 1977-1987, ISSN 0018-9200
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/jssc.2018.2818681

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