Project description
Computing Systems
New tools for application development on many-core systems
<p>The current trend in computing architectures is to integrate in embedded devices an increasing number of processing cores. Latest generation smart phones carry two processors plus graphic accelerators while in the near future we can envision to scale up to 16 or 32 processors. This trend requires a global rethinking of software and hardware design methodologies, due to the increased complexity of creating and running applications on such embedded devices. <br />The 2PARMA project aims at overcoming these issues by providing tools and software components to facilitate the application development and execution on many-core systems. The goal is to <strong>speed up the application development by a factor of 2</strong> and to <strong>optimize the usage of system resources (such as battery power) from 20% to 35% </strong>with respect to conventional power management strategies, while preserving the target Quality of Service.</p><p>STMicroelectronics will obtain faster time-to-market by exploiting improved programmability and demonstrable adaptability of the P2012 to multi-application sce-narios. Synopsys will consider the inclusion of 2PARMA metho-dologies and tools in their EDA tool portfolio, thus enhancing European competitiveness in the global computing market and ultimately leading to new high technology jobs in Europe. The public availability of research results and related tools will benefit industry and academic embedded systems community. Industrial and academic partners will benefit from the availability of an integrated application/architecture platform featuring Many-core Computing Fabric validated on a set of demanding applications, which will serve as research platform after the project completion. The demonstration of concepts and porting of tools on standard platforms represent another fast vehicle to achieve a wider and fast dissemination and exploitation of the project results in both academic, research and industrial communities. The cooperation between industrial and academic partners will lead to faster technology transfer and increased influence on international standards (such as Khronos OpenCL). On the long term, the project will benefit the European citizens by providing them faster and lower power multi-application embedded devices such as smart phones and set-top boxes. <br /> </p>
The current trend in computing architectures is to replace complex superscalar architectures with small homogeneous processing units connected by an on-chip network. This trend is mostly dictated by inherent silicon technology frontiers, which are getting as closer as the process densities levels increase. The number of cores to be integrated in a single chip is expected to rapidly increase in the coming years, moving from multi-core to many-core architectures. This trend will require a global rethinking of software and hardware design approaches.This class of computing systems (Many-core Computing Fabric) promises to increase performance, scalability and flexibility if appropriate design and programming methodologies will be defined to exploit the high degree of parallelism exposed by the architecture. Other potential benefits of Many-core Computing Fabric include energy efficiency, improved silicon yield, and accounting for local process variations. To exploit these potential benefits, effective run-time power and resource management techniques are needed. With respect to conventional computing architectures, Many-core Computing Fabric offers some customisation capabilities to extend and/or configure at run-time the architectural template to address a variable workload.The 2PARMA project aims at overcoming the lack of parallel programming models and run-time resource management techniques to exploit the features of many-core processor architectures. To this purpose, a proper Consortium has been set up to gather the required expertise in the areas of system/application software and computing architectures.The 2PARMA project focuses on the definition of a parallel programming model combining component-based and single-instruction multiple-thread approaches, instruction set virtualisation based on portable bytecode, run-time resource management policies and mechanisms as well as design space exploration methodologies for Many-core Computing Fabrics.
Fields of science
Topic(s)
Call for proposal
FP7-ICT-2009-4
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Funding Scheme
CP - Collaborative project (generic)Coordinator
20133 Milano
Italy