ICESTARS eyes next generation wireless chips
People are dependent on wireless communication. This is particularly evident in the number of radios, mobile phones, GPS systems and network hotspots used worldwide. But with every wireless communication channel that emerges, pressure grows for people to develop technology to meet market demands. The EU project ICESTARS ('Integrated circuit/electromagnetic simulation and design technologies for advanced radio systems-on-chip'), supported with EUR 2.8 million in funding, will deliver new methodologies and prototype tools to meet these challenges. IC design automation tools are core ingredients in the planned developments of wireless communication channels in the SHF (super high frequency) and EHF (extremely high frequency) bands. The ICESTARS team explained that these tools play an important role in the development of complex nanoscale designs, as well as in achieving single-pass design success to clinch market opportunities and avoid expensive re-spins (i.e. a software program that must be fixed before release to guarantee quality). Accurate simulations of such systems are currently unavailable. The researchers said that only a new generation of transceiver architecture and related CAD (computer-aided design) tools can help launch multi-standard and software-defined radios on the market. The researchers must ensure that the consumption of power is kept to a minimum, and that this power is traded off with the circuit's linearity and gain. Another challenge is that, with respect to centre frequencies in the GHz range, high-tech designs are restricted by the noise figure. Single-chip integration of high-GHz wireless modules can be possible if problems in the available design flows are sorted out, the team noted. The ICESTARS researchers said a 2006 roadmap by Sematech, a group fuelling the commercialisation of technology innovations into manufacturing solutions, indicated that innovative CAD tools and mathematical models must become available in order to fix a number of problems, including managing analogue/digital mixed signal simulation, parasitic extraction, and system design and methodologies. The ICESTARS partners confirmed that results will emerge thanks to the delivery of methodologies and prototype tools. The team plans to combine the research results of a number of domains to identify the dependencies between the various parts of the RF (radio frequency) design. The Mathematical Institute of the University of Cologne in Germany is participating in the study, and is developing new mathematical algorithms for the next generation of radio chips. 'In the future, mobile devices will provide customers with services ranging from telephony and internet to mobile TV and remote banking, anytime, anywhere,' explained Professor Caren Tischendorf. 'It is impossible to realise the necessary, extremely high data-transfer rates within the frequency bands used today (approximately 1-3GHz).' The project team expects to deliver low-cost wireless chips with the capacity to operate in a frequency range of up to 100GHz. ICESTARS project leader Dr Marq Kole of NXP Semiconductors in the Netherlands said the partners expect to achieve the acceleration of the chip development process by 2010. 'We aim to have accelerated the chip development process in the extremely high frequency range by new methods and simulation tools in order to actively maintain the European chip developers on a top position over the whole spectrum of wireless communications,' said Dr Kole. Other project participants include the Finnish company AWR-APLAC, which will develop frequency-domain simulation algorithms, and the German semiconductor group Qimonda, which will develop advanced analogue simulation techniques.
Countries
Netherlands