Recent technologies such as multi-processor systems on chips are driving new applications in the microelectronics industry. Using concurrency to speed up the system, they can deliver more processing power, which opens up more potential uses. However, it is very difficult to find concurrency errors as current verification and testing methods are limited, time consuming and expensive. This means new designs are often released with bugs that are only discovered once the products are applied in real-world situations. Trouble-shooting these problems involves greater costs. 'Predictive techniques for system level analysis of multiprocessors' (PREDICTMP) was an EU-funded project looking at system-level design methods that can improve the reliability of concurrent software to make product development more efficient. PREDICTMP developed a predictive run-time verification technique based on simulations that reliably finds concurrency errors early in the development process to save time and money. Researchers also developed a new concurrency-aware mutation testing-based coverage metric and an automated test generation framework for SystemC designs. These innovations increased the detection of existing and potential faults. Results have been validated on a large industrial design and will lead to patent applications. The three-year project has improved the ability of multi-processor manufacturers to find errors and enhance the quality of verification methods available to them. Ultimately, these industrial design verification tools will reduce the time-to-market for new products. Further time and cost savings can be achieved if investors fund research on optimising automation, integration and scalability for SystemC designs.
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30 October 2020