HiPEAC conference on embedded architectures in Gothenburg, Sweden

The third international conference on high performance embedded architectures and compilers will be held from 27 to 29 January in Gothenburg, Sweden.

Addressing scientists, computer architects and compiler builders working in the field of high performance computer architecture and compilation for embedded systems, the conference aims at the dissemination of scientific knowledge and the promotion of international contacts among scientists from academia and industry.

Topics of interest include:
- processor architectures;
- memory system optimisation;
- power, performance and implementation efficient designs;
- interconnection networks, networks-on-chip, network interfaces and processors;
- security, dependability, and predictability support;
- application specific processors and accelerators;
- reconfigurable architectures;
- simulation and methodology;
- compiler techniques for embedded processors;
- feedback-directed optimisation;
- programme characterisation and analysis techniques;
- dynamic compilation, adaptive execution, and continuous profiling/optimisation;
- back-end code generation;
- binary translation/optimisation;
- code size/memory footprint optimisations.For further information, please visit:
http://www.hipeac.net/conference/(opens in new window)