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Content archived on 2024-05-29

Smart chips for smart surroundings


The overall mission of the proposed 4S project (Smart Chips for Smart Surroundings) is to define and develop efficient (ultra low-power), flexible, reconfigurable core building blocks, including the supporting tools, for future Ambient Systems. The aim is to establish Europe as the dominant player in the field of efficient reconfigurable architectures for ambient devices.

Reconfigurability offers the flexibility and adaptability needed for future ambient devices, it provides the efficiency needed for these systems, it enables systems that can adapt to rapidly changing environmental conditions, it enables communication over heterogeneous wireless networks, and it reduces risks: reconfigurable systems can adapt to standards that may vary from place to place or standards that have changed during and after product development. It is envisaged that in the long run, work performed within this project will lay the foundations for the development of a new range of ultra low-power components, architectures, tools, guidelines and standards that underpins the future development of Ambient Systems.

Main objectives for the 4S project are:
- The design of a flexible reconfigurable platform based on heterogeneous building blocks such as analogue blocks, hardwired functions, fine and coarse grain reconfigurable tiles, DSPs and microprocessors that can adapt to several algorithms for Ambient Systems without the need for specialized ASICs. The concept is verified on hardware platforms. Furthermore, a digital SoC and an analogue front-end IC will be designed. The DRM (Digital Radio Mondiale) and MPEG4 applications will be implemented on the platform in order to verify the flexibility of the platform.
- To provide a design flow at compile time, which reduces development time and to provide functions that automatically allocate resources of the reconfigurable platform based on Quality of Service, power and user demands. The DRM and MPEG4 applications will verify the design flow.


Call for proposal

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Participants (10)